Design of a rad-hard library of digital cells for space applications

Abstract

Abstract-This paper proposes a design methodology for a digital library of cells resistant to cosmic radiation. Most important effects due to radiation are avoided or mitigated using ad hoc design techniques. Fault injection techniques are used to validate the design. Simulations results demonstrate that the cells designed in a 180 nm CMOS technology are tolerant to 1.5 mA current peak due to interaction with a single high-energy particle.

SkyFlash EC project: Architecture for a 1Mbit S-Flash for space applications

“…PMOS transistors are less sensitive to this effect as the positive charge results in accumulation in the substrate. To avoid the issue of leakages in NMOS devices, it is possible to use edge less transistors (ELTs), which avoid the oxide transition region between drain and source, thus eliminating the leakage between them [10]. SEE can result in destructive and non-destructive errors, depending on the capability of the device to recover after the particle influence [11].…”

A multi-megarad, radiation hardened by design 512 kbit SRAM in CMOS technology

“…To reduce propagation of single event transients, all the blocks have been designed avoiding pass-transistor logic, and elementary gates were specifically designed to minimize the number of transistors not connected to power supplies [6].…”

Schematic protection method from influence of total ionization dose effects on threshold voltage of MOS transistors

“…The second reason is shown in figure 1. Except the main channel, two parasitic channels are being farmed in MOS fabrication process (figure 1) [4]. Due to TID effects influence of these parasitic transistors becomes notable.…”

“…Mobility of charge carriers is being measured as , (1.5) where 0  is the pre-irradiation mobility, There are several methods [4] which are used to protect MOS transistors from TID effects. Both schematic and layout protection methods are being used [1][2][3][4]. In this paper a schematic protection method from threshold voltage shifts is discussed.…”

“…It is known [1][2][3][4], that TID effects influence on threshold voltage, subthreshold and leakage currents, mobility of charge carriers (  ) and transconductance (g m ) of MOS transistors.…”