Design of a Nine-Transistor/Two-Magnetic-Tunnel-Junction-Cell-Based Low-Energy Nonvolatile Ternary Content-Addressable Memory

Abstract

Towards a low search-energy nonvolatile ternary content-addressable memory (TCAM), we propose a novel nine-transistor/two-magnetic-tunnel-junction (9T–2MTJ) nonvolatile TCAM cell circuit with a high-speed accessibility. Since critical path for switching in the TCAM cell circuit is only a single metal-oxide-semiconductor (MOS) transistor, switching delay of the TCAM word circuit is minimized. As a result, the worst-case switching delay of 0.22 ns is achieved in a 144-bit word circuit under a 90 nm complementary MOS (CMOS)/MTJ technology, which is about 2.6 times faster than that of a conventional CMOS-based TCAM. In order to minimize the active power dissipation in the proposed TCAM, a multi-level segmented match-line scheme that maximally brings inessential cells to standby state is also applied to the 9T–2MTJ-cell-based word circuit. Finally, low search-energy of 0.73 fJ/bit/search is achieved in a 144-bit × 256-word nonvolatile TCAM together with eliminating standby power using nonvolatility.

Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM

“…For performance comparisons, a conventional 9T-2MTJ cell based TCAM is designed, based on the word structure shown in Fig. 6, where R P is 2 kΩ and R AP is 4 kΩ used in [9]. The two TCAMs are simulated using HSPICE at the supply voltage of 1.0V and the temperature of 25 degrees Celsius.…”

“…The search delay time is 920 ps that is 28% larger than that without a soft error as the resistance value of 2R AP +R P is closer to the threshold than the original value of 3R AP . Table I shows performance comparisons with the conventional TCAM [9]. The conventional TCAM is designed for the same size of the proposed TCAM and simulated for performance comparisons.…”

“…The MTJ device stores one-bit information as a resistance value [7] and has recently been exploited for nonvolatile memories (MRAM) and TCAMs [8], [9]. The stored bit is quite robust against direct particle strikes [10], but might be flipped by a current pulse signal generated at peripheral transistors due to particle strikes [11].…”

From MTJ Device to Hybrid CMOS/MTJ Circuits: A Review

“…Various hybrid CMOS/MTJ circuits are realized using this approach, a few of them are NV-NAND/AND, NV-NOR/OR and NV-XNOR/XOR [241,305], magnetic flip-flops [306,307], magnetic look up table [92,308], magnetic full adder [31,290,303,[309][310][311][312], magnetic decoder [313], magnetic true random number generator [314][315][316], magnetic arithmetic logic unit (ALU) [317,318] and magnetic cryptographic circuits [319] etc.. Due to high magnetic sensitivity of MTJ, hybrid circuits are further used in developing the magnetic sensors [14,320,321], NV-FPGA circuit [92,[322][323][324][325][326][327][328][329][330][331], NVternary content addressable memory (TCAM) memory [332][333][334][335][336][337][338][339], NV random access logic LSI unit [38,340], ultra-lowpower VLSI design processor…”

FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric

“…These NVM-based CAM designs can help reduce area and power consumption while enabling acceleration of various neural network architectures [2], [11]. MTJ based CAM designs, e.g., 9T-2MTJ CAM cell [12], mitigates the memory density bottleneck, but the small R ON /R OF F ratio and large write power of MTJs significantly degrades the CAM performance. The CAM designs based on resistive memory devices, including ReRAM [7] and phase change memory (PCM) [6], are advantageous in memory density, but have limited R ON /R OF F ratio and significant write power, which is challenging to overcome.…”