Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM

Onizawa, Naoya; Matsunaga, Satoru; Hanyu, Takahiro

doi:10.1109/newcas.2014.6934016

Cited by 4 publications

(2 citation statements)

References 10 publications

(16 reference statements)

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“…Some examples of the latest MTJ-based TCAM designs include 9-transistors-6-MTJs (9T-6MTJ) [6], 3T-2MTJ [7] and 20T-4MTJ [8] structures. In these designs, a logic bit is represented by the high or low resistance states (HRS or LRS) of one or a few MTJ devices and the searching operation is realized through detecting the resistance value.…”

Section: Introductionmentioning

confidence: 99%

“…In these designs, a logic bit is represented by the high or low resistance states (HRS or LRS) of one or a few MTJ devices and the searching operation is realized through detecting the resistance value. Compared to SRAM-based TCAM with 12 transistors (12T-SRAM) [9], these designs significantly decrease the number of transistors and therefore reduce the cell area [6][7] [10]. Particularly, Xu et al proposed a structure which utilizes the voltage-dividing, instead of detecting the exact MTJ resistance value in reading and searching operations [7].…”

Section: Introductionmentioning

confidence: 99%

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A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback

Yan

Zhang

et al. 2015

Proceedings of the 25th Edition on Great Lakes Symposium on VLSI

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As manufacture process scales down rapidly, the design of ternary content-addressable memory (TCAM) requiring high storage density, fast access speed and low power consumption becomes very challenging. In recent years, many novel TCAM designs have been inspired by the research on emerging nonvolatile memory technologies, such as magnetic tunneling junction (MTJ), phase change memory (PCM), and memristor. These designs store a data as the resistive variable of a nonvolatile device, which usually results in limited sensing margin and therefore constrains the searching speed of TCAM architecture severely. To further enhance the performance and robustness of TCAMs, we proposed two novel cell designs that utilize MTJs as data storage units-the symmetrical dual-N structure and the asymmetrical P-N scheme. In both designs, a body bias feedback circuit is integrated to enlarge the sensing margins. Compared with an existing MTJ-based TCAM structure, the tolerance in gate voltage variation of the symmetrical dua-N (asymmetrical P-N) scheme can significantly improve 59.5% (21.2%). The latency and the dynamic energy consumption in one searching operation at the word length of 256 bits are merely 590.35ps (97.89ps) and 65.05f J/bit (36.85f J/bit), not even mentioning that the use of nonvolatile MTJ devices avoids unnecessary leakage power consumption.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback

Yan

Zhang

et al. 2015

Proceedings of the 25th Edition on Great Lakes Symposium on VLSI

View full text Add to dashboard Cite

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A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation

Wang

Zhang

Zeng

et al. 2018

2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

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Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM)

Narla

Kumar

Laguna

et al. 2022

IEEE J. Explor. Solid-State Comput. Devices Circuits

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This article proposes a novel magnetoelectric (ME) effect-based ternary content addressable memory (TCAM). The potential array-level write and search performances of the proposed ME-TCAM are studied using experimentally calibrated compact physical models and SPICE simulations. The voltage-controlled operation of the ME devices eliminates the large joule heating present in the current-controlled magnetic devices and their low-voltage write operation makes them more energy-efficient compared to static random access memory-based TCAMs (SRAM-TCAMs). The proposed compact TCAM outperforms its SRAM counterpart with 1.35× and 14.4× improvements in search and write energy, respectively, and its nonvolatility eliminates the standby leakage. We project an error rate below 10 −4 while considering various sources of variation in magnetic and CMOS devices. At the application level, using memory-augmented neural networks (MANNs), we project a 2× energy-delay-area-product (EDAP) improvement over an SRAM-TCAM. 12 13 14 INDEX TERMS BiFeO 3 (BFO), magnetoelectric (ME), ME-magnetic random access memory (MRAM), memory-augmented neural network (MANN), micromagnetic, multiferroic, ternary content addressable memory (TCAM).I. INTRODUCTION 15 W ITH the ever growing limits imposed by intercon-16 nects, novel computing paradigms that may reduce 17 data traffic between logic and memory have become more 18 attractive. Various in-memory computing approaches [1] 19 are therefore being explored in the context of different 20 applications/domains such as neural networks [2], associative 21 memories [3], spin-torque nano-oscillators [4], probabilistic 22 computing [5], and reservoir computing [6]. Ternary content 23 addressable memory (TCAM) is an associative memory that 24 performs parallel data searches over a memory array and 25 outputs if/where a match occurs. TCAMs have been used 26 in a variety of applications, such as few-shot learning [7], 27 [8], deoxyribonucleic acid (DNA) read alignment [9], 28 deep random forest [10], and hyperdimensional comput-29 131 proper choice of device parameters, this would happen only 132 when there is a mismatch between the stored and search data. 133 If the search bit is ''X,'' then SL and SL are grounded, 134 which prevents T3 from discharging ML. If the stored bit 135 is ''X,'' then both MTJs are in the anti-parallel state and 136 V fix∼V s/2 . We use appropriate threshold voltages to ensure 137 that V s /2 is adequately lower than the threshold voltage of 138 T3 to prevent T3 from discharging ML. Table 2 summarizes 139 the search operation for all possible stored and search bits 140 combinations. It should be noted that kV s < V s /2, where 141 k ≡ R p /(R p + R ap ) (R p and R ap are the resistances of the 142 MTJs in the parallel and anti-parallel state, respectively).143Hence, the worst case in terms of the margins and the leakage 144 current in T3 is when a ''don't care'' bit is stored. V s values 145 and MTJ device parameters are discussed later in Section IV.

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Design of a soft-error tolerant 9-transistor/6-magnetic-tunnel-junction hybrid cell based nonvolatile TCAM

Cited by 4 publications

References 10 publications

A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback

A High-Speed Robust NVM-TCAM Design Using Body Bias Feedback

A Novel 15T-4MTJ based Non-volatile Ternary Content-Addressable Memory Cell for High-Speed, Low-Power and High-Reliable Search Operation

Modeling and Design for Magnetoelectric Ternary Content Addressable Memory (TCAM)

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