Design Approach for Ring Amplifiers

Abstract

Ring amplifiers are an advantageous new amplifier architecture, but designing them needs to be done in a time consuming process using manual transient simulations. AC based design criteria are of limit usability, because of their large signal operation. This paper presents an alternative design approach for ring amplifiers. A set of cost functions and parameters is developed and the parameters' effect on the amplifier's stability, accuracy and power consumption is explained in detail. The optimization process is derived from a simple ring-amplifier model and a stability criterion. This criterion is analyzed in the context of circuit parameters, design constraints and other ringamplifier designs. A new battery-based self-biased ring-amplifier architecture is introduced and the first stage integrator of a switched-capacitor Delta-Sigma modulator is realized using the described ring-amplifier architecture. The proposed optimization process is successfully performed using 180 nm and 40 nm technology nodes (second node with two supply voltages) and the three designs are analyzed and compared. The optimization process is derived from a basic ring-amplifier model and can be applied to other ring-amplifier structures.

A 2.5-GS/s Four-Way-Interleaved Ringamp-Based Pipelined-SAR ADC with Digital Background Calibration in 28-nm CMOS

“…More importantly, ringamps are more suitable for fine CMOS processes and have application scenarios in various types of ADCs due to the versatility of their structures. In the last decade, many ringamp-based ADC works [24,[29][30][31][32][33][34][35][36][37][38][39] have appeared. Essentially, there are two different directions of the application, one for high resolution (signal-to-noise-and-distortion-ratio (SNDR) ≥ 70 dB) and the other for high speed (sampling rate fs ≥ 500 MHz), such as the dual-deadzone RAMP-based two-step SAR ADC [34], which achieves the highest SNDR for a ringampbased high-resolution ADC, while [33] used a dead zone degeneration technique to realize the fastest sampling rate (fs = 1 GHz) for single-channel implementation.…”

A 1.2 V, 92 dB Dynamic-Range Delta-Sigma Modulator Based on an Output Swing-Enhanced Gain-Boost Inverter

“…It achieves high DC gain but comes with large power consumption and additional Miller compensation circuits. A ring amplifier structure was introduced in [15], but the main issue lies in its poor linear operation in closed-loop circuits. In [16,17], a conventional gain-boost inverter is proposed; it overcomes the low DC gain but results in poor output swing.…”