Design and fabrication of multiple-valued multiplexer using negative differential resistance circuits and standard SiGe process

Gan, Kwang–Jow; Liang, Dong-Shong; Tsai, Cher-Shiung; Wen, Chun-Ming; Chen, Yaw-Hwang

doi:10.1016/j.sse.2008.01.006

Cited by 5 publications

(3 citation statements)

References 15 publications

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“…Recently, our research group has demonstrated two novel NDR circuits composed of Si-based metal-oxidesemiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) devices, which are named as MOS-NDR and MOS-HBT-NDR circuits. We have successfully demonstrated their possible application in the multiple-valued memory circuit [9], logic circuit [10], and multiplexer [11]. The fabrication of such NDR-based applications could be implemented by the standard CMOS and BiCMOS techniques.…”

Section: Introductionmentioning

confidence: 99%

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Gan

Liang

Chen

2010

IEICE Trans. Inf. & Syst.

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SUMMARYThe paper demonstrates a novel multiple-valued logic (MVL) design using a three-peak negative differential resistance (NDR) circuit, which is made of several Si-based metal-oxide-semiconductor fieldeffect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT) devices. Specifically, this three-peak NDR circuit is biased by two switch-controlled current sources. Compared to the traditional MVL circuit made of resonant tunneling diode (RTD), this multiple-peak MOS-HBT-NDR circuit has two major advantages. One is that the fabrication of this circuit can be fully implemented by the standard BiCMOS process without the need for molecular-beam epitaxy system. Another is that we can obtain more logic states than the RTD-based MVL design. In measuring, we can obtain eight logic states at the output according to a sequent control of two current sources on and off in order.

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Section: Introductionmentioning

confidence: 99%

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Gan

Liang

Chen

2010

IEICE Trans. Inf. & Syst.

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“…Fig. 1a shows the schematic of the proposed positive edge triggered (PET) programmable MOS-NDR device, based on the structure of the non-programmable MOS-NDR device described in [5]. Figure 1b depicts its I-V characteristic.…”

Section: Introductionmentioning

confidence: 99%

Single phase MOS-NDR mobile networks

Núñez

Avedillo

Quintana

2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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Devices with an I-V characteristic exhibiting Negative Differential Resistance (NDR) are attractive from the circuit design point of view as it has been demonstrated by Resonant Tunneling Diodes (RTDs) circuits. Ideas coming from RTDbased designs can be exported to an "all CMOS" environment by using transistor circuits to generate the NDR characteristic (MOS-NDR). In this paper novel programmable MOS-NDRs are proposed and used to realize threshold logic gates on the basis of the MOnostable to BIstable Operating principle. It is shown that these gates can be connected to build up networks that are operated in a pipelined fashion using a single phase clock scheme.

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“…As described previously, our programmable MOS-NDR device allows this input-controlled modification. Note that other programmable MOS-NDR devices have been proposed that control the peak current by modifying voltage V INV [4], and so are not suitable to implement series-connected gates. The MOBILE operating principle can be easily extended to implement threshold logic gates as it has been demonstrated using RTDs [1,2].…”

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confidence: 99%

Efficient realisation of MOS-NDR threshold logic gates

2009

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A novel realisation of inverted majority gates based on a programmable MOS-NDR device is presented. A comparison, in terms of area and power consumption, has been performed to demonstrate that the proposed circuit is more efficient than a similar reported structure. Introduction: Negative differential resistance (NDR) devices can be used in the design of logic circuits owing to their unique NDR current -voltage (I -V) characteristic. This property can be exploited to significantly increase the functionality implemented by a single gate (in comparison to CMOS and bipolar technologies) [1]. Recently, resonant tunnelling diodes (RTD) have been widely used to demonstrate the operation of logic circuits that take advantage of the properties of NDR devices. In particular, a number of threshold gates (TGs) based on RTDs monolithically integrated with three-terminal devices, which implement complex logic functions, have been fabricated and have demonstrated high speed and robust operation [2]. Reciprocally, circuit ideas coming from RTD-based designs can be extended to an 'all CMOS' environment consisting of MOS-NDR devices [3 -5].In this Letter, we propose a new programmable MOS-NDR device that can be used to obtain efficient realisations of threshold logic gates, as occurs with RTDs. To prove this, we have selected a key circuit the performance of which, in terms of area and power consumption, can be improved with regard to other MOS-NDR or CMOS realisations.

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Design and fabrication of multiple-valued multiplexer using negative differential resistance circuits and standard SiGe process

Cited by 5 publications

References 15 publications

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Novel Multiple-Valued Logic Design Using BiCMOS-Based Negative Differential Resistance Circuit Biased by Two Current Sources

Single phase MOS-NDR mobile networks

Efficient realisation of MOS-NDR threshold logic gates

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