Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array

Attarzadeh, Hourieh; Lim, Sung Kyu; Ytterdal, Trond

doi:10.1016/j.mejo.2015.11.007

Cited by 5 publications

(4 citation statements)

References 21 publications

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“…The matrices Tsub, Ttsv, Ttl, T3, and T4 were used. First, T1 and T2 were calculated using Equations (18) and (19), respectively, then a transformation to Y1 and Y2 of T1 and T2, respectively, Because of the diversity of electronic devices, and the presence of many stacked dies in 3D technology, the second studied circuit contains two stacked dies with two interconnect lines. The concerned structure is presented in Figure 4.…”

Section: Calculation Of Time-domain Tsv Noise Coupling In 3d-ic Desigmentioning

confidence: 99%

“…The matrices T sub , T tsv , T tl , T 3 , and T 4 were used. First, T 1 and T 2 were calculated using Equations (18) and (19), respectively, then a transformation to Y 1 and Y 2 of T 1 and T 2 , respectively, was made. This transformation was performed to find the global Y g of the circuit without Z 1 , Z 4 , and Z tsv near Z 1 and Z 4 .…”

Section: Calculation Of Time-domain Tsv Noise Coupling In 3d-ic Desigmentioning

confidence: 99%

“…As the TSV gate bias increases, the depletion region capacitance starts to increase, and it acts in series with oxide capacitance. Hence, a TSV capacitor, C TSV , is modeled with a series connection of the oxide capacitors and a depletion region capacitor [18]. The width of the depletion region is calculated for every geometrical variation by means of the exact Poisson's equation for an average TSV voltage of 0.5 V, and modeled as an area where the substrate has no free charge carriers [19].…”

Section: Introductionmentioning

confidence: 99%

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Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

2019

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Typical 3D integrated circuit structures based on through-silicon vias (TSVs) are complicated to study and analyze. Therefore, it seems important to find some methods to investigate them. In this paper, a method is proposed to model and compute the time-domain coupling noise in 3D Integrated Circuit (3D-IC) based on TSVs. It is based on the numerical inversion Laplace transform (NILT) method and the chain matrices. The method is validated using some experimental results and the Pspice and Matlab tools. The results confirm the effectiveness of the proposed technique and the noise is analyzed in several cases. It is found that TSV noise coupling is affected by different factors such as source characteristics, horizontal interconnections, and the type of Inputs and Outputs (I/O) drivers.

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Section: Calculation Of Time-domain Tsv Noise Coupling In 3d-ic Desigmentioning

confidence: 99%

“…The matrices T sub , T tsv , T tl , T 3 , and T 4 were used. First, T 1 and T 2 were calculated using Equations (18) and (19), respectively, then a transformation to Y 1 and Y 2 of T 1 and T 2 , respectively, was made. This transformation was performed to find the global Y g of the circuit without Z 1 , Z 4 , and Z tsv near Z 1 and Z 4 .…”

Section: Calculation Of Time-domain Tsv Noise Coupling In 3d-ic Desigmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

2019

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“…The vibration film is made of monocrystalline silicon, and its stability and reliability were verified. Currently, the interconnection of the 2D CMUT array is based on the through silicon via (TSV) [22]. In this technology, lithography etching of the positive and negative sides needs to be repeatedly performed, and the depth-width ratio and verticality of the through hole are higher, which increases the preparation steps and undoubtedly increases the preparation difficulty.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of 2-D Capacitive Micromachined Ultrasonic Transducer (CMUT) Array through Silicon Wafer Bonding

Wang

Zhang

et al. 2022

Micromachines

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Capacitive micromachined ultrasound transducers (CMUTs) have broad application prospects in medical imaging, flow monitoring, and nondestructive testing. CMUT arrays are limited by their fabrication process, which seriously restricts their further development and application. In this paper, a vacuum-sealed device for medical applications is introduced, which has the advantages of simple manufacturing process, no static friction, repeatability, and high reliability. The CMUT array suitable for medical imaging frequency band was fabricated by a silicon wafer bonding technology, and the adjacent array devices were isolated by an isolation slot, which was cut through the silicon film. The CMUT device fabricated following this process is a 4 × 16 array with a single element size of 1 mm × 1 mm. Device performance tests were conducted, where the center frequency of the transducer was 3.8 MHz, and the 6 dB fractional bandwidth was 110%. The static capacitance (29.4 pF) and center frequency (3.78 MHz) of each element of the array were tested, and the results revealed that the array has good consistency. Moreover, the transmitting and receiving performance of the transducer was evaluated by acoustic tests, and the receiving sensitivity was −211 dB @ 3 MHz, −213 dB @ 4 MHz. Finally, reflection imaging was performed using the array, which provides certain technical support for the research of two-dimensional CMUT arrays in the field of 3D ultrasound imaging.

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Multi-chip Modules and Multi-chip Packaging

Božanić

Sinha

2019

Smart Sensors, Measurement and Instrumentation

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Design and Analysis of a Stochastic Flash Analog-to-Digital Converter in 3D IC technology for integration with ultrasound transducer array

Cited by 5 publications

References 21 publications

Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

Numerical Laplace Inversion Method for Through-Silicon Via (TSV) Noise Coupling in 3D-IC Design

Fabrication of 2-D Capacitive Micromachined Ultrasonic Transducer (CMUT) Array through Silicon Wafer Bonding

Multi-chip Modules and Multi-chip Packaging

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