Demonstrating performance improvement of complementary TFET circuits by I<inf>on</inf> enhancement based on isoelectronic trap technology

Material engineering for silicon tunnel field-effect transistors: isoelectronic trap technology

“…Complementary TFET (CTFET) circuit operation has been demonstrated with the IET technology. [29] The experiment was slightly different from the experiments in the previous section. I ON enhancement by factors of five and two has been achieved in P-and N-type TFETs, respectively [ Fig.…”

“…Of these, two papers utilized III-V TFETs, [42,43] and the other four utilized Si-TFETs. [29,48,49,58] Si-TFETs show good performance owing to the ease of integration. The guidelines for TFET development are as discussed in the previous section; however, there remain difficulties in satisfying all the guidelines.…”

“…The IET technology enhances tunneling current. [29] (b) SEM image, schematic structure, and transfer curves of TFET inverters. [29] (c) Optical microscope image, schematic circuit diagram, and output waveforms of 23-stage full TFET ring oscillators.…”

“…[29] The enhancement in Si-TFET was assumed to be as high as in the case of the diodes; that is, enhancement by a factor of 735 was assumed. Here, not only I ON enhancement but also threshold-voltage optimization and device miniaturization to reduce capacitance were considered.…”

“…As the tunneling current is essentially related to material science, many TFETs with new materials, including not only Ge or III-V materials [25] but also two-dimensional semiconductors, [26] have been reported. Recently, a material engineering technique to enhance tunneling current in Si has been proposed, which utilizes isoelectronic traps (IETs), [27,28] Experimental demonstrations of the current enhancement and improvement of circuit performance have been reported, [27,29] in which IET-assisted tunneling (IETT) is utilized instead of conventional band-to-band tunneling (BTBT).…”