Defects and strain analysis of GaAs/Si nanostructures from high‐resolution HAADF‐STEM images

Abstract

The increasing demand for high‐performance, ultra‐small size electronics and photonics requires the development of new nanostructured materials. Promising candidates for this purpose are monolithically integrated GaAs nanocrystals, selectively grown by metal organic vapor phase epitaxy (MOVPE), on top of Si nano‐tips and nano‐pillars (Fig. 1,2) with ~ 60 nm and ~ 40 nm diameter, respectively. Growth on substrate nanopatterns eliminates threading dislocations similar to “aspect ratio trapping” in submicron trenches and pits [1]. It may even prevent plastic strain relaxation by misfit dislocations in contrast to the growth of thin films on planar substrates by taking advantage of the compliant substrate effects [2]. Consequently, it is important to study the local atomic defects at the GaAs/Si interface and their evolution with changing shape/size of the substrate pattern, and to analyze the residual elastic strain of the grown crystals by means of the scanning transmission electron microscopy (STEM) technique in order to find the maximum crystal size below which elastic relaxation is favorable. STEM investigation of the GaAs/Si nanostructures has been performed on lamellas prepared by focused ion beam (FIB). From the analysis of aberration‐corrected high‐resolution high‐angle annular dark‐field (HAADF) STEM images the presence of 60º misfit dislocations (MDs), as well as 90º and 30º Shockley misfit partial dislocations (MPDs) at the GaAs/(001)Si tip interface has been revealed (Fig. 3). The latter generate extrinsic and intrinsic stacking faults, respectively, which propagate through the entire crystal. Gliding of a group of 30º Shockley MPDs along parallel successive slip planes produces a nanotwin. In the GaAs crystals grown on (001) Si pillars two intrinsic stacking faults, lying in {111}‐type planes, meet at the interface and build a V‐shaped defect (Fig. 4). According to the literature [3], such V‐shaped configuration of stacking faults suggests their formation upon island coalescence. These stacking faults border at the interface a stair‐rod dislocation, which is formed by the interaction of two 30º Shockley MPDs located in the Si pillar. Among the observed defects, the most efficient ones for relaxing misfit strain are 60º MDs, whereas 30º MPDs release strain only partially. Geometrical phase analysis (GPA) [4] has been also applied to estimate the misfit strain in the GaAs crystals.