2019
DOI: 10.7567/1347-4065/ab106c
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Deeply and vertically etched butte structure of vertical GaN p–n diode with avalanche capability

Abstract: A vertical p–n diode with a simple edge termination structure on a GaN free-standing substrate is demonstrated. The edge of this device is terminated simply by etching a drift layer deeply and vertically. A device simulation revealed that the electric field at the device edge was more relaxed and uniformly applied by etching the mesa deeper than the depletion region. The fabricated device showed low leakage current and avalanche capability, and its breakdown characteristics could be reproduced many times. By e… Show more

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Cited by 48 publications
(23 citation statements)
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“…Fully vertical GaN-on-GaN diode and transistor demonstrators have reported excellent performances (up to 3-4 kV capability [16][17][18][19][20][21][22][23][24]). However, GaN substrates are small and expensive, with wafer costs per unit area for GaN-on-GaN ranging up to $ 100/cm 2 for 2-inch wafers [25,26].…”
mentioning
confidence: 99%
“…Fully vertical GaN-on-GaN diode and transistor demonstrators have reported excellent performances (up to 3-4 kV capability [16][17][18][19][20][21][22][23][24]). However, GaN substrates are small and expensive, with wafer costs per unit area for GaN-on-GaN ranging up to $ 100/cm 2 for 2-inch wafers [25,26].…”
mentioning
confidence: 99%
“…An edge termination that can provide extra negative charges to terminate the electric field lines at the device boundary to reduce any localized peak electric field at any surface or corners is important for the realization of an APD. Figure 3 shows several edge terminations that were proposed for avalanche GaN p-n diodes, including the ion implantation-based edge termination (Kizilyalli et al, 2013;Ji et al, 2020a), etch-based edge termination (Fukushima et al, 2019;Maeda et al, 2018), and field-plated edge termination in which the field plate is connected to the anode electrode (Nomoto et al, 2016;Ohta et al, 2019). The schematic of the electric field distribution in the GaN p-n diodes with and without the ion-implanted edge termination is shown in Figure 4.…”
Section: Growth Techniquesmentioning
confidence: 99%
“…Figure 4B shows the schematic of a GaN p-n diode with the ion-implanted moat etch termination (Ji et al, 2020a), where the corners are rounded during isolation and can effectively reduce the localized peak electric field. (Fukushima et al, 2019); (D) field plate edge termination (Nomoto et al, 2016;Ohta et al, 2019); and (E) moat etch edge termination with ion implantation compensation (Ji et al, 2020a). compensate for the dry etching-induced damages, eliminating the leakage current through the etched surface.…”
Section: Growth Techniquesmentioning
confidence: 99%
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“…[1][2][3][4] Among GaN power devices, vertical devices have attracted much attention from the viewpoints of power-conversion and chip-size efficiencies. [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21] The development of high-quality GaN substrates has made it possible to easily fabricate vertical p þ n diodes on freestanding substrates. A record high breakdown voltage of 5 kV has been achieved in combination with a low on-resistance R on of 1.25 mΩ cm 2 at a forward voltage V F of 5 V. [14] The quality of substrates has also been improved.…”
Section: Introductionmentioning
confidence: 99%