Deciding properties of timed transition models

Abstract. Verification of a test case for testing the conformance of protocol implementations against the formal description of the protocol involves verifying three aspects of the test case: expected input/output test behavior, test verdicts, and the test purpose. We model the safety and liveness properties of a test case using branching time temporal logic. There are four types of safety properties: transmission safety, reception safety, synchronization safety, and verdict safety. We model a test purpose as a liveness property and give a set of notations to formally specify a test purpose. All these properties expressed as temporal formulas are verified using model checking on an extended state machine graph representing the composed behavior of a test case and protocol specification. This methodology is shown to be effective in finding errors in manually developed conformance test suites.

show abstract

“…Further research is needed to incorporate the notion of time in protocol and test case models similar to the timed-transition systems in [38]. …”

Section: Discussionmentioning

confidence: 99%

Test case verification by model checking

Naik

Sarikaya

1993

Form Method Syst Des

View full text Add to dashboard Cite

show abstract

“…Supervisory control of DES with timing information, known as timed DES (TDES), was firstly introduced in [5], [6], based on the timed transition model from [19], [20], and [21]. The theory added timing information to supervisory control allowing one to specify lower and upper time bounds for events.…”

Section: Related Workmentioning

confidence: 99%

“…We will check the per state conditions (lines 10-12 and lines [17][18][19][20][21][22][23][24][25][26][27], and then if the states take us to two different states for a common σ transition (line 19), we check to see if the new states already have a tuple in V isited (line 19). If they do, either they are known to be equivalent or we have already processed the pair and added their requirements to P ending.…”

mentioning

confidence: 99%

Sampled-Data Supervisory Control

Leduc

Wang

2010

IFAC Proceedings Volumes

View full text Add to dashboard Cite

This thesis focuses on issues related to implementing theoretical Discrete-Event Systems (DES) supervisors, and the concurrency and timing delay issues involved.Sampled-data (SD) supervisory control deals with timed DES (TDES) systems where the supervisors will be implemented as SD controllers. An SD controller is driven by a periodic clock and sees the system as a series of inputs and outputs. On each clock edge (tick event), it samples its inputs, changes states, and updates its outputs.In this thesis, we identify a set of existing TDES properties that will be useful to our work, but not sufficient. We extend the TDES controllability definition to a new definition, SD controllability, which captures several new properties that will be useful in dealing with concurrency issues, as well as make it easier to translate a TDES supervisor into an SD controller.We then establish a formal representation of an SD controller as a Moore Finite State Machine (FSM), and describe how to translate a TDES supervisor to a FSM, as well as necessary properties to be able to do so. We discuss how to construct a single centralized controller, as well as a set of modular controllers and show that they will produce equivalent output.Next, we capture the enablement and forcing action of a translated controller in the form of a TDES supervisory control map, and show that the closed-loop behavior of this map and the plant is the same as that of the plant and the original TDES supervisor. We also show that our method is robust with respect to nonblocking and certain variations in the actual behavior of our physical system.We also introduce a set of predicate-based algorithms to verify the SD controllability property, as well as certain other conditions that we require. We have created a software tool for verifying these conditions and provide the source code in the appendix. We have implemented these algorithms using binary decision diagrams (BDD).For illustrative purpose, we have produced a set of examples which fail the key conditions discussed in this thesis, as well as a successful application example based on a Flexible Manufacturing System. We also presented the corresponding FSM, iii iv translated from the example's supervisors.

show abstract

“…Notable works include Brave and Heymann's "clock automata" [2], Ostroff's "timed transition models" [9], Brandin and Wonham's timed DES (TDES) [1], Cassandras's "timed state automata" [5], Wong-Toi and Hoffman's model based on "timed automata" [12], and Cofer and Garg's model based on "timed Petri nets" [6]. We adopt Brandin and Wonham's TDES (or BW model) as the framework for developing a timed supervisor localization theory for two reasons.…”

Section: Introductionmentioning

confidence: 99%

Supervision localization of timed discrete-event systems

et al. 2013

View full text Add to dashboard Cite

We study supervisor localization for real-time discrete-event systems (DES) in the Brandin-Wonham framework of timed supervisory control. We view a real-time DES as comprised of asynchronous agents which are coupled through imposed logical and temporal specifications; the essence of supervisor localization is the decomposition of monolithic (global) control action into local control strategies for these individual agents. This study extends our previous work on supervisor localization for untimed DES, in that monolithic timed control action typically includes not only disabling action as in the untimed case, but also "clock preempting" action which enforces prescribed temporal behavior. The latter action is executed by a class of special events, called "forcible" events; accordingly, we localize monolithic preemptive action with respect to these events. We demonstrate the new features of timed supervisor localization with a manufacturing cell case study, and discuss a distributed control implementation.

show abstract

Deciding properties of timed transition models

Cited by 101 publications

References 13 publications

Test case verification by model checking

Test case verification by model checking

Sampled-Data Supervisory Control

Supervision localization of timed discrete-event systems

Contact Info

Product

Resources

About