Data Transmission and Thermo-Optic Tuning Performance of Dielectric-Loaded Plasmonic Structures Hetero-Integrated on a Silicon Chip

Abstract

International audienceWe demonstrate experimental evidence of the data capture and the low-energy thermo-optic tuning credentials of dielectric-loaded plasmonic structures integrated on a silicon chip. We show 7-nm thermo-optical tuning of a plasmonic racetrack-resonator with less than 3.3 mW required electrical power and verify error-free 10-Gb/s transmission through a 60-mu m-long dielectric-loaded plasmonic waveguide

Merging Plasmonics and Silicon Photonics Towards Greener and Faster “Network-on-Chip” Solutions for Data Centers and High-Performance Computing Systems

“…Nevertheless, the coexistence of silicon photonics and plasmonics on the same platform imposes proper formation of the SOI motherboard for efficient hetero-integration of the DLSPP waveguides [31]: By etching the SOI motherboard down to 200nm (Figure 2(a)), the formed recess in the 2μm-thick buried oxide (BOX) of the SOI substrate serves as the hosting region of a DLSPP waveguide. Towards selecting the dimensions of the DLSPP waveguides, it should be taken into account that the DLSPP waveguide characteristics, i.e., the mode field confinement, effective index and propagation length, are strongly influenced by the width and height of the employed dielectric ridge [29] as a result of the SPP field confinement that occurs when this ridge is placed on top of a metal film.…”

“…Towards finalizing the design specifications, various parameters should be examined, i.e., the Si waveguide's width, the vertical offset between the two types of waveguides, the existence of a longitudinal gap in the metallic stripe as usually exists in fabricated structures, so as to optimize the matching of the optical modes during transition [37]. The validity of the simulation outcomes is achieved by their comparison with cut-back measurements for a variety of fabricated all Si and hybrid Si-DLSPP waveguide samples [31], [37]. As a result, a coupling loss per interface variance with a mean value of -2.5dB is feasible for 175nm-wide Si waveguides with 200nm vertical offset and DLSPP waveguides with 0.5μm metal gap.…”

“…Apart from the strong mode confinement, the main advantage of the DLSPP waveguide technology stems from the nature of the chosen dielectric material which, depending on its thermo-optic (TO) [25], [31]- [35] or electro-optic [24], [36] properties, allows for the exploitation of the corresponding effects, enabling in this way the deployment of highly functional active plasmonic elements. Regarding the TO effect, the underlying metallic layer, which is in direct contact with the polymer and therefore with the largest part of the DLSPP mode field, serves as an energyefficient electrode that yields immediate change of the effective index of the propagating mode at the presence of electric current, leading to fast TO responses.…”

“…These advantages render the DLSPP waveguides ideal for TO manipulation of the plasmonic waves in various functional circuitry implementations like modulation [32], [33], ON/OFF gating [25] and switching [34], [35]. The progress made so far on active DLSPP-based circuits renders the TO effect as the most mature mechanism for bringing low-energy active plasmonics in true data traffic environments [25], [31].…”

“…In this perspective, silicon photonics can be used for low-loss optical transmission in passive interconnection components, plasmonics can provide small footprint and low power consumption in active switching modules and electronics can be employed for intelligent decision-making mechanisms. However, considering that plasmonic technology is a premature technology with only a few years of development compared to silicon photonics and with limited functionality so far, the way towards the implementation of such hybrid NoC environments requires priorly: a) the interconnection between silicon and plasmonic waveguide structures in a SOI platform in order to avoid the employment of high-loss plasmonic waveguides for passive circuitry [30], [37], b) the proof of the credentials of plasmonics in wavelength division multiplexing (WDM) applications so as to support the complete portfolio of optics [38], c) the demonstration of functional active plasmonic circuitries in realistic data traffic environments [25], [31].…”