Damage to InP and InGaAsP surfaces resulting from CH4/H2 reactive ion etching

Abstract

Structural and electrical damage imparted to InP and In0.72Ga0.28As0.6P0.4 (λg≂1.3 μm) surfaces during CH4/H2 reactive ion etching (RIE) have been examined. X-ray photoelectron spectroscopy was used to monitor changes in the surface chemistry, Rutherford backscattering spectrometry was used to measure crystallographic damage, and current-voltage and capacitance-voltage measurements were made to examine electrically active damage and its depth. Two classes of damage are observed: crystallographic damage originating from preferential loss of P (As) and/or ion bombardment-induced collision cascade mixing and, for p-type material, hydrogen passivation of Zn acceptors. Etching at 13.6 MHz, 60–90 mTorr, 10% CH4/H2, and bias voltages of ∼300 V contains gross (≳1%) damage as measured by RBS to within 40 Å and electrically active damage to within 200 Å of the surface. This is a factor of 3–6 shallower than other RIE processes operated below 10 mT with comparable or higher bias voltages. Acceptor passivation of both InP and InGaAsP, arising from the association of hydrogen with Zn sites, occurs to a depth of 2000 Å after RIE and causes a decrease in carrier concentration in this layer. The effect is reversed, however, by rapid thermal processing at temperatures between 350 and 500 °C.

Low-noise properties of dry gate recess etched InP HEMTs

“…The higher leakage current for dry etched devices can be explained by physical or chemical changes to the surface during the dry etching step [5] and leads to a shot noise which is independent of the frequency. At 2 GHz the minimum noise figure Fmin for the dry etched device is higher than for the wet etched one as shown in Fig.…”

“…An important issue of dry etching transistors is the introduction of physical or chemical damage into the device [4] and [5]. In this work, we report the noise properties of selectively dry etched InP HEMT's and compare their behavior with wet chemically etched devices.…”

Effect of a Two-Step Recess Process Using Atomic Layer Etching on the Performance of $\hbox{In}_{0.52}\hbox{Al}_{0.48}\hbox{As/In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ p-HEMTs

“…However, the Ar-based plasma etching has a finite etch selectivity (≤ 20) of InP against In 0.52 Al 0.48 As [5]. More seriously, the Ar-based plasma etching usually uses highly energetic reactive ions to achieve a vertical etch profile and, thus, tends to produce plasma-induced damages at the surface and in the bulk of the In 0.52 Al 0.48 As barrier layer, resulting in increased surface roughness and change of surface stoichiometry [6]- [9]. This damage eventually leads to the degradation of Schottky gate and overall device characteristics.…”

(Invited) Towards a Vertical and Damage Free Post-Etch InGaAs Fin Profile: Dry Etch Processing, Sidewall Damage Assessment and Mitigation Options

“…(14,(16)(17)(18)(19)(21)(22)(23)(24)(25)(30)(31)(32)(33) have been used to yield structural, chemical and electrical information relating to etch-induced damage. Our concern here is the extent of electrical damage to the dielectric/sidewall interface.…”