D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop

Schrape, Oliver; Breitenreiter, Anselm; Andjelković, Marko; Krstić, Miloš

doi:10.1109/dsd.2018.00047

Cited by 6 publications

(1 citation statement)

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“…First, the hardness is achieved by the arrangement of the internal cells, and the robustness does not depend on the amount of insertion delay of a clock signal. In delaying-the-clock approaches [55]- [57], the individual clock tree or clock skew group latency determines the transient filter size. Second, the insertion of delay elements in the data line is more beneficial in terms of power consumption.…”

Section: Baseline Tmr Flip-flopmentioning

confidence: 99%

Design and Evaluation of Radiation-Hardened Standard Cell Flip-Flops

Schrape

Andjelković

Breitenreiter

et al. 2021

IEEE Trans. Circuits Syst. I

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Use of a standard non-rad-hard digital cell library in the rad-hard design can be a cost-effective solution for space applications. In this paper we demonstrate how a standard nonrad-hard flip-flop, as one of the most vulnerable digital cells, can be converted into a rad-hard flip-flop without modifying its internal structure. We present five variants of a Triple Modular Redundancy (TMR) flip-flop: baseline TMR flip-flop, latch-based TMR flip-flop, True-Single Phase Clock (TSPC) TMR flip-flop, scannable TMR flip-flop and self-correcting TMR flipflop. For all variants, the multi-bit upsets have been addressed by applying special placement constraints, while the Single Event Transient (SET) mitigation was achieved through the usage of customized SET filters and selection of optimal inverter sizes for the clock and reset trees. The proposed flip-flop variants feature differing performance, thus enabling to choose the optimal solution for every sensitive node in the circuit, according to the predefined design constraints. Several flip-flop designs have been validated on IHP's 130 nm BiCMOS process, by irradiation of custom-designed shift registers. It has been shown that the proposed TMR flip-flops are robust to soft errors with a threshold Linear Energy Transfer (LET) from (32.4 MeV• cm 2 mg ) to (62.5 MeV• cm 2 mg ), depending on the variant.

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Section: Baseline Tmr Flip-flopmentioning

confidence: 99%