CURRENT: a test generation system for I/sub DDQ/ testing

IDD Q measurement is a time consuming process. Thus, reducing the number of IDDQ measurements have a great impact on the test time. Carefully selecting a few IDDQ measurement points is therefore an important problem. This problem has been studied for detecting leakage faults but not for bridging faults. We present novel algorithms to select IDDQ measurement points to detect bridging faults. Experimental results obtained are very encouraging. The method can also be used: by test generators to compress 1DDQ test sets; and to maximize the fault coverage when a fixed number of measurement points are given.

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“…If B i is a set of the nodes then the ordered pair , 7), (2,8), (3,7), (3,8), (9,17), (9,18), (17,18)}.…”

Section: Faultlist Representationmentioning

confidence: 99%

“…The solution can be used for combinational as well as sequential circuits. To the best of our knowledge this problem has been addressed for BFs only in [7]. Unlike our solution, the solution presented in [7] can be used only if we restrict the target set of BFs to a small subset of BFs.…”

Section: Introductionmentioning

confidence: 99%

Algorithms to select I DDQ measurement points to detect bridging faults

Chakravarty

Thadikaran

1996

J Electron Test

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“…These approaches mainly address issues of fault extraction and fault modeling [9]. Once the faults are modeled only constraints due to the logic function of the circuit are considered during ATPG [9,2,8,12].…”

Section: Introductionmentioning

confidence: 99%

Targeting Leakage Constraints during ATPG

Fey

Komatsu

Furukawa

et al. 2008

2008 17th Asian Test Symposium

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In previous technology generations IDDQ testing used to be a powerful technique to detect physical faults that are not covered by standard fault models or functional tests. Due to shrinking feature sizes and consequently increasing leakage currents IDDQ testing becomes difficult in the deep-submicron area. One of the problems is the vector dependency of leakage current. Even in good devices the leakage current may vary significantly from one test vector to the next.In this work we present an ATPG framework that allows to generate test vectors within tight constraints on leakage currents. The target range for the leakage current is automatically determined. Experiments on the ITC99 benchmark suite yield testsets that achieve 100% fault coverage for the larger circuits, even when the range is narrowed down to 50% of the standard deviation of random vectors.

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“…Mahlstedt et al [23] ITRA-SH, TBF LE, ITRA-SH, inter-gate short library-based, layout, random sample in experiments…”

Section: Test Generation For Two-line Bridging Faults (Tbfs)mentioning

confidence: 99%

“…The paper includes following ve techniques; removal of inert subsequences, replacement of inert subsequences, removal with partial substitution, conditional removal of fault-detecting subsequences, conditional removal of inert subsequences. The techniques [20] SAF seq TPG for SAF Chen et al [9] TBF seq TPG for SAF, genetic algorithm Dalpasso et al [10] TBF comb SPICE, BDD Isern & Figueras [17] INTRA-SH, TBF comb TPG for SAF Reddy et al [29] INTRA-SH, TBF comb random tests, TPG for SAF Mahlstedt et al [23] INTRA-SH, TBF comb random tests, deterministic TPG Higami et al [13] INTRA Since measurement of IDDQ is a time-consuming process, reduction of IDDQ measurement v ectors is more effective for reducing the total testing time. Therefore a method to select a small number of IDDQ measurement vectors has been proposed in [5,6,8,14,16,20,26].…”

Section: Test Compactionmentioning

confidence: 99%

Fault models and test generation for IDDQ testing

Higami

Takamatsu²,

Saluja³

et al.

Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106)

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Abstract| This paper surveys recent research related to IDDQ testing, particularly focuses on fault models and test generation methods.(1) The paper provides a taxonomy of fault models that have been studied in literature, and classies these models into a small set of faults.(2) The paper describes ecient test generation methods and fault simulation methods. Test compaction methods, including reduction of the total number of test vectors and selection of IDDQ measurement v ectors, are also described.

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CURRENT: a test generation system for I/sub DDQ/ testing

Cited by 12 publications

References 21 publications

Algorithms to select I DDQ measurement points to detect bridging faults

Algorithms to select I DDQ measurement points to detect bridging faults

Targeting Leakage Constraints during ATPG

Fault models and test generation for IDDQ testing

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