Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator

Drutarovský, Miloš; Varchola, Michal

doi:10.1109/ddecs.2008.4538778

Cited by 6 publications

(3 citation statements)

References 9 publications

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“…The eBACS ECRYPT benchmark [6] gives values for 256-bit ECDSA of, for example, 1.88 ms for generation and 2.2 ms for verification on an Intel Core 2 Duo at 1.4 GHz and 2.9 ms respectively, 3.4 ms on an Intel Atom 330 at 1.6 GHz. Values for a crypto system based on an ARM7 32-bit microcontroller are given in [7] for a key bit length of 233 bit. Using a comb table precomputation (w = 4) 742 ms are needed for a generation and 1240 ms for a verification of an ECDSA signature.…”

Section: Related Workmentioning

confidence: 99%

Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems

Glas

Sander

Stuckert

et al. 2011

International Journal of Reconfigurable Computing

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Growing ubiquity and safety relevance of embedded systems strengthen the need to protect their functionality against malicious attacks. Communication and system authentication by digital signature schemes is a major issue in securing such systems. This contribution presents a complete ECDSA signature processing system over prime fields for bit lengths of up to 256 on reconfigurable hardware. By using dedicated hardware implementation, the performance can be improved by up to two orders of magnitude compared to microcontroller implementations. The flexible system is tailored to serve as an autonomous subsystem providing authentication transparent for any application. Integration into a vehicle-to-vehicle communication system is shown as an application example.

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Section: Related Workmentioning

confidence: 99%

Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems

Glas

Sander

Stuckert

et al. 2011

International Journal of Reconfigurable Computing

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“…The effect of the resonance between the AES cryptographic algorithm and the dataflow nature of the GALS-based LPSP is evident by the high throughput. GALS-based LPSP 5.3 Baseline LEON3 [2] 504.9 LEON3 with SPx [2] 184.5 LEON3 with HWAccel [14] 15.8 Baseline Xtensa LX2 [21] 1681 Xtensa with SPx [21] 18.9 Baseline CoreMP7 [7] 8.4…”

Section: Comparisonsmentioning

confidence: 99%

“…The predominant soft cores that have been adopted as a co-processor for security applications or their internal architecture has been modified to accommodate new instructions for cryptographic algorithms are the LEON2 [22], LEON3 [11,12], Xtensa LX2 [21], Xtensa T1040 [19], and CoreMP7 [7].…”

Section: Comparisonsmentioning

confidence: 99%

GALS-based LPSP: Performance Analysis of a Novel Architecture for Low Power High Performance Security Processors

Farouk

El-Hadidi

Elfarag

2012

IJNC

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The past two decades have witnessed a revolution in the use of electronic devices in our daily activities. Increasingly, such activities involve the exchange of personal and sensitive data by means of portable and light weight devices. This implied the use of security applications in devices with tight processing capability and low power budget. Current architectures for processors that run security applications are optimized for either high-performance or low energy consumption. We propose an implementation for an architecture that not only provides high performance and low energy consumption but also mitigates security attacks on the cryptographic algorithms which are running on it. The proposed architecture of the GloballyAsynchronous Locally-Synchronous-based Low Power Security Processor (GALS-based LPSP) inherits the scheduling freedom and high performance from the dataflow architectures and the low energy consumption and flexibility from the GALS systems. In this paper, a prototype of the GALS-based LPSP is implemented as a soft core on the Virtex-5 (xc5-vlx155t) FPGA. The architectural features that allow the processor to mitigate Side-Channel attacks are explained in detail and tested on the current encryption standard, the AES. The performance analysis reveals that the GALS-based LPSP achieves two times higher throughput with one and a half times less energy consumption than the currently used embedded processors.

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