2011
DOI: 10.1155/2011/836460
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Prime Field ECDSA Signature Processing for Reconfigurable Embedded Systems

Abstract: Growing ubiquity and safety relevance of embedded systems strengthen the need to protect their functionality against malicious attacks. Communication and system authentication by digital signature schemes is a major issue in securing such systems. This contribution presents a complete ECDSA signature processing system over prime fields for bit lengths of up to 256 on reconfigurable hardware. By using dedicated hardware implementation, the performance can be improved by up to two orders of magnitude compared to… Show more

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Cited by 29 publications
(16 citation statements)
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References 23 publications
(22 reference statements)
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“…In summary, our implementation of Bliss is superior to [16] in almost all aspects. In addition to that Glas et al [15] report a vehicle-to-X communication accelerator based on an ECDSA signature over 256-bit prime fields. With respect to this, our Bliss implementation shows higher performance at less resource cost.…”
Section: Bliss Operationsmentioning
confidence: 99%
“…In summary, our implementation of Bliss is superior to [16] in almost all aspects. In addition to that Glas et al [15] report a vehicle-to-X communication accelerator based on an ECDSA signature over 256-bit prime fields. With respect to this, our Bliss implementation shows higher performance at less resource cost.…”
Section: Bliss Operationsmentioning
confidence: 99%
“…The achieved times for signature generation and verification were respectively 0.94ms and 1.61ms. Another solution proposed in [27] designed to operate over prime fields with a key length of 256-bit, for a FPGA Xilinx Virtex 5 using 14256 LUT/FF achieved a 7.15ms generation time and a 9.09ms verification time. Implementations like these are still too slow for the worst case scenario, verifying only a few messages per second.…”
Section: Hardware Implementation Approachmentioning
confidence: 99%
“…The implementation results indicates signature generation in 7.15ms is expectedly the slowest operation requires a point multiplication and generation of a _______________________________________________________________________________________ random integer. Verification in 9.09ms which requires computation of two point multiplications is expectedly the fastest operation [8] L.Batina proposed the identification of RFID-tags will reach high security levels and identification protocols like RFID-tags based on the DL problem on elliptic curves are implemented on a constrained device which requires 8500 and 1400 gates. Case of both elliptic curved over F 2 P C and over composite fields F 2 2 P are investigated.…”
Section: Related Work and Contributionsmentioning
confidence: 99%