Cross-correlation of specification and RTL for soft IP analysis

Singh, Bhanu Pratap; Shankar, Arunprasath; Wolff, Francis; Papachristou, C.; Weyer, Daniel; Clay, Steve

doi:10.7873/date2014.303

Cited by 3 publications

(6 citation statements)

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“…The second scheme is to obtain the trusted IP as much as possible. The third method relies on a new paradigm of expert-system-based IP analysis [ 120 , 121 ].…”

Section: Hardware Trojans Protectionmentioning

confidence: 99%

Hardware Trojans in Chips: A Survey for Detection and Prevention

Dong

Liu

et al. 2020

Sensors

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Diverse and wide-range applications of integrated circuits (ICs) and the development of Cyber Physical System (CPS), more and more third-party manufacturers are involved in the manufacturing of ICs. Unfortunately, like software, hardware can also be subjected to malicious attacks. Untrusted outsourced manufacturing tools and intellectual property (IP) cores may bring enormous risks from highly integrated. Attributed to this manufacturing model, the malicious circuits (known as Hardware Trojans, HTs) can be implanted during the most designing and manufacturing stages of the ICs, causing a change of functionality, leakage of information, even a denial of services (DoS), and so on. In this paper, a survey of HTs is presented, which shows the threatens of chips, and the state-of-the-art preventing and detecting techniques. Starting from the introduction of HT structures, the recent researches in the academic community about HTs is compiled and comprehensive classification of HTs is proposed. The state-of-the-art HT protection techniques with their advantages and disadvantages are further analyzed. Finally, the development trends in hardware security are highlighted.

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“…The second scheme is to obtain the trusted IP as much as possible. The third method relies on a new paradigm of expert-system-based IP analysis [ 120 , 121 ].…”

Section: Hardware Trojans Protectionmentioning

confidence: 99%

Hardware Trojans in Chips: A Survey for Detection and Prevention

Dong

Liu

et al. 2020

Sensors

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“…Knowledge based methods are different from the methods mentioned above [4], [5]. These methods build a knowledge base for RTL code and specification and identifies the circuits that exactly match the specification.…”

Section: A Related Workmentioning

confidence: 99%

“…These methods build a knowledge base for RTL code and specification and identifies the circuits that exactly match the specification. Results in [4], [5] show that, in most cases, the identification coverage is larger than 60%, and thus the workload for manual check can be reduced.…”

Section: A Related Workmentioning

confidence: 99%

“…FASTrust can be regarded as another kind of knowledge based method. Unlike the knowledge based methods proposed in [4], [5] which built RTL base and spec base, and tried to identify all benign functional modules, FASTrust aims to directly identify malicious circuits. We find several features in the flip-flop level CDFG that can represent different HT types.…”

Section: B Motivationmentioning

confidence: 99%

“…However, when such agreement is not available (and it is the common case, at least for today), it is essential to verify whether 3PIPs contains HTs. Knowledge-guided methods analyze the differences between the specification and the procured IP core, and can identify trusted parts in 3PIPs [4], [5]. Redundancy based methods diversify the sources of 3PIPs and check the equivalence between the results from different version 3PIPs which should have the same functionality [6]- [8].…”

Section: Introductionmentioning

confidence: 99%

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FASTrust: Feature analysis for third-party IP trust verification

Song

Chen

Zhang

et al. 2015

2015 IEEE International Test Conference (ITC)

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Third-party intellectual property (3PIP) cores are widely used in integrated circuit designs and it is essential to ensure their trustworthiness. Existing hardware trust verification techniques suffer from high computational complexity, low extensibility, and inability to detect implicitly-triggered hardware trojans (HTs). To tackle the above problems, in this paper, we present a novel 3PIP trust verification framework, namely FASTrust, which conducts HT feature analysis on the flip-flop level control-data flow graph (CDFG) of the circuit. FASTrust is not only able to identify existing explicitly-triggered and implicitly-triggered HTs appeared in the literature in an efficient and effective manner, but more importantly, it has the unique advantage of being scalable to defend against future and more stealthy HTs by adding new features to the system.

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