Converting a Three-Stage Pseudoclass-AB Amplifier to a True-Class-AB Amplifier

Surkanti, Punith R.; Furth, Paul M.

doi:10.1109/tcsii.2012.2188462

Cited by 36 publications

(23 citation statements)

References 16 publications

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“…The micrograph of the fabricated circuits is shown in Figure 4. [16,17]. The proposed OTA has the highest reported FOM L = 70 V·pF/μs·μA for a single-stage OTA without degradation of open-loop gain and at the same time with twice the GBW of a class A OTA.…”

Section: Simulation and Experimental Resultsmentioning

confidence: 88%

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Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing

Pourashraf

Ramírez-Angulo

López-Martín

et al. 2017

Circuit Theory & Apps

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A scheme to achieve simultaneously extremely high slew-rate improvement and avoiding open-loop gain degradation in one-stage super class AB op-amps is introduced. It overcomes the serious shortcoming of super class AB operational transconductance amplifiers that shows very high-output current enhancement factors at the expense of degrading the open-loop gain. The proposed scheme uses dynamically biased cascode transistors to avoid gain and slew-rate degradation. Experimental results of a super class AB operational transconductance amplifier in 180-nm complementary metal-oxide semiconductor technology with open-loop gain of 67 dB, a factor 2 improvement in GBW, and a current enhancement factor of 270 verify the proposed scheme.

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Section: Simulation and Experimental Resultsmentioning

confidence: 88%

“…3. In order to compare efficiency of class AB op-amps, the large signal figure of merit FOM L = (SR·C L )/I Q = I out-MAX /I Q is used [16,17]. 4.…”

Section: Simulation and Experimental Resultsmentioning

confidence: 99%

Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing

Pourashraf

Ramírez-Angulo

López-Martín

et al. 2017

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

“…Table 2 shows the performance comparison of this work with other works in the literature. FOM 1 [3], [7], [8] and FOM 2 [3] are defined as follows: L max 1 Supply FOM 1 [3], [7], [8] and FOM 2 [3] are defined as follows: L max 1 Supply…”

Section: Measurement Resultsmentioning

confidence: 99%

A Power-Efficient CMOS Adaptive Biasing Operational Transconductance Amplifier

Torfifard

A’ain²

2013

ETRI J

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This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only 0.4 µW from a supply voltage of ±0.6 V and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using 0.18-µm CMOS technology.

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“…After investigating various methodologies reported earlier [11]- [17], also considering some very recently designed novel methodologies [18]- [21], compensation methodologies can be combined broadly into two: first, Nested Miller [22]- [29] and the second is Reversed Nested Miller [30] [37]. To implement miller effect, to get proper splitting of poles, required PM and/or appropriate time for settling in both types methodologies, two capacitors are required for compensation.…”

Section: Network Used For Frequency Compensationmentioning

confidence: 99%

Low Power Continuous-Time Delta-Sigma Modulators Using the Three Stage OTA and Dynamic Comparator

Gupta¹,

Gupta²,

Baghel³

2018

IJET

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A second-order sigma delta modulator that uses an operational transconductance amplifier as integrator and latch comparator as quantizer. The proposed technique where a low power high gain OTA is used as integrator and another circuit called dynamic latch comparator with two tail transistors and two controlling switches are used to achieve high speed, low power and high resolution in second order delta sigma modulator. It enhances the power efficiency and compactness of the modulator by implementing these blocks as sub modules. A second order modulator has been designed to justify the effectiveness of the proposed design. Technology 180nm CMOS process is used to implement complete second order continuous time sigma delta modulator. We introduce the sub threshold three stage OTA, which is a way of achieving low distortion operation with input referred noise at 1 KHz is equal to the 2.2647pV/√ and with low power consumption of 296.72nW. A high-speed, low-voltage and a low-power Double-Tail dynamic comparator is also proposed. The proposed structure is contrasted with past dynamic comparators. In this paper, the comparator's delay will be investigated and systematic analysis are inferred. a novel comparator using two tail transistor is proposed, here circuitry of a customized comparator having two tail is changed for low power dissipation and also it operates fast at little supply voltages. By maintaining the outline and by including couple of transistors, during the regeneration strengthening of positive feedback can be maintained, this results in amazingly diminished delay parameter. It is investigated that in proposed design structure of comparator using two tail transistors, power consumption is reduced and delay time is also diminished to a great extent. The proposed comparator is having maximum clock frequency that is possibly expanded up to 1GHz at voltages of 1 V whereas it is dissipating 10.99 µW of power, individually. By using sub threshold three stage OTA and dynamic standard two tail latch comparator, designed second order sigma delta ADC will consume 29.95µW of power.

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Converting a Three-Stage Pseudoclass-AB Amplifier to a True-Class-AB Amplifier

Cited by 36 publications

References 16 publications

Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing

Super class AB OTA without open‐loop gain degradation based on dynamic cascode biasing

A Power-Efficient CMOS Adaptive Biasing Operational Transconductance Amplifier

Low Power Continuous-Time Delta-Sigma Modulators Using the Three Stage OTA and Dynamic Comparator

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