Controlled two-step solid-phase crystallization for high-performance polysilicon TFT's

Subramanian, Vivek; Dankoski, P.; Degertekin, Levent; Khuri-Yakub, B.T.; Saraswat, Krishna C.

doi:10.1109/55.605445

Cited by 51 publications

(24 citation statements)

References 12 publications

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“…The disadvantage of this technique is that the crystallization may take a long time (several hours 0018-9383/98$10.00 © 1998 IEEE at 600 C A large fraction of this time consists of the time before any nucleation has occurred, called the incubation time. Efforts have been made to reduce the incubation time without sacrificing conditions favorable to the maximization of grain size [10].…”

Section: A Solid-phase Crystallizationmentioning

confidence: 99%

High-performance germanium-seeded laterally crystallized TFTs for vertical device integration

Subramanian

Saraswat

1998

IEEE Trans. Electron Devices

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Abstract-Increasing chip complexity and area has resulted in interconnect delay becoming a significant fraction of overall chip delay. Continued scaling of design rules will further aggravate this problem. Vertical integration of devices will enable a substantial reduction in chip size and thus in interconnect delay. We present a novel technique to achieve vertical integration of CMOS devices. Germanium is used as a seeding agent at the source and/or drain of thin film transistors (TFT's) to laterally crystallize amorphous silicon films, resulting in high-performance devices. This is achieved through the formation of large grain polysilicon with a precise control over the location of the grain. TFT's have been demonstrated offering substantial performance improvement over conventional unseeded polycrystalline TFT's, with demonstrated mobilities as high as 300 cm 2 /V-s. The process is fully CMOS compatible and has a low thermal budget. It is highly scalable to deep-submicron technologies and, with suitable optimization, should enable the production of high-performance, high density, vertically integrated ULSI.

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Section: A Solid-phase Crystallizationmentioning

confidence: 99%

High-performance germanium-seeded laterally crystallized TFTs for vertical device integration

Subramanian

Saraswat

1998

IEEE Trans. Electron Devices

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“…This technique provides good uniformity of grain size; however, the grains themselves are small-in the order of hundreds of nanometres or less. 5) As a consequence, long channel devices contain many GBs. However, if we scale the transistor down to the submicron regime, channel length approaches the grain size, and only a small number of GBs will be present in the device.…”

Section: Introductionmentioning

confidence: 99%

Simulation Study of the Dependence of Submicron Polysilicon Thin-Film Transistor Output Characteristics on Grain Boundary Position

Walker

Uno

Mizuta

2005

Jpn. J. Appl. Phys.

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We investigate the impact of varying the grain boundary (GB) position on the output (I d -V d ) characteristics of submicron single GB polysilicon thin film transistors (TFTs), by two-dimensional (2D), drift-diffusion based, device simulation. We employ a localized GB trapping model with a distribution of both donor-like and acceptor-like trap states over the forbidden energy gap of the GB region. We show that for devices with channel lengths in the deep submicron regime, significant variations in output conductance (g d ) occur as the GB position is varied. Specifically, we find that output conductance increases as the GB approaches the drain edge. Furthermore, the sensitivity of output conductance to the GB position increases as channel length decreases. The findings have important implications for any future analogue three-dimensional (3D) IC design that uses polysilicon as a device material.

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“…For instance, LPCVD poly-Si may have electron mobility approximately 10 cm 2 /Vs compared to the thermally annealed one having 30 cm 2 /Vs [743]. Excimer laser crystallized poly-Si may have electron mobility as high as 100 to 200 cm 2 /Vs [744].…”

Section: Discussionmentioning

confidence: 99%

Organic semiconductors for device applications: current trends and future prospects

Ahmad

2014

Journal of Polymer Engineering

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Abstract:With the rich experience of developing silicon devices over a period of the last six decades, it is easy to assess the suitability of a new material for device applications by examining charge carrier injection, transport, and extraction across a practically realizable architecture; surface passivation; and packaging and reliability issues besides the feasibility of preparing mechanically robust wafer/substrate of single-crystal or polycrystalline/ amorphous thin films. For material preparation, parameters such as purification of constituent materials, crystal growth, and thin-film deposition with minimum defects/ disorders are equally important. Further, it is relevant to know whether conventional semiconductor processes, already known, would be useable directly or would require completely new technologies. Having found a likely candidate after such a screening, it would be necessary to identify a specific area of application against an existing list of materials available with special reference to cost reduction considerations in large-scale production. Various families of organic semiconductors are reviewed here, especially with the objective of using them in niche areas of large-area electronic displays, flexible organic electronics, and organic photovoltaic solar cells. While doing so, it appears feasible to improve mobility and stability by adjusting π-conjugation and modifying the energy bandgap. Higher conductivity nanocomposites, formed by blending with chemically conjugated C-allotropes and metal nanoparticles, open exciting methods of designing flexible contact/interconnects for organic and flexible electronics as can be seen from the discussion included here.

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Controlled two-step solid-phase crystallization for high-performance polysilicon TFT's

Cited by 51 publications

References 12 publications

High-performance germanium-seeded laterally crystallized TFTs for vertical device integration

High-performance germanium-seeded laterally crystallized TFTs for vertical device integration

Simulation Study of the Dependence of Submicron Polysilicon Thin-Film Transistor Output Characteristics on Grain Boundary Position

Organic semiconductors for device applications: current trends and future prospects

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