Constant voltage stress induced current in Ta₂O₅stacks and its dependence on a gate electrode

Abstract

Response of 8 nm Ta 2 O 5 stacks with different gates (Al, W and Au) to voltage stress at gate injection is studied by probing under various voltage/time conditions at room temperature and at 100 • C. A stress-induced leakage current (SILC) is detected in all samples and reveals gate dependence. It is established that the pre-existing traps actually govern this response, and the impact of gate-induced defects is stronger. The Au-gated devices are the most susceptible to the stress degradation. Two processes-electron trapping at pre-existing traps and positive charge build-up-are suggested to be responsible for generation of SILC. It is concluded that despite some gate effects, the origin of CVS degradation in this particular high-k dielectric is different from that in SiO 2 .

Traps and trapping phenomena and their implications on electrical behavior of high-k capacitor stacks

“…The common feature, however, is that in most of the cases these mechanisms are defect ͑trap͒ related, which has serious implications on the degradation behavior and reliability of the stacks. Similar parallel shift has been observed for various Ta 2 O 5 -based stacks ͑including its doped or mixed modifications͒ [32][33][34] which implies that this behavior is an attribute of high-k dielectrics containing Ta 2 O 5 . Therefore, electrons could not acquire high enough energy to break bonds at the anode interface or to cause anode-hole injection-the main mechanisms responsible for electrical degradation in SiO 2 .…”

Peculiarities of time-dependent-dielectric breakdown characteristics of pure and doped Ta2O5 stacks

“…According to the TEM data, the weak spots are not local physical thinning of the dielectric, (pure and doped one). The SILC-measurements of W-gated Ta 2 O 5 capacitors under CVS at gate injection have revealed that the processes of electron trapping at pre-existing traps and positive charge build-up are responsible for the SILC [23]; there was no evidence of stress-induced generation of new traps. Unlike the case of Ta 2 O 5 , the SILC in Al-doped Ta 2 O 5 is a result of new traps generation [24].…”

Effects of O2/Ar ratio and annealing temperature on electrical properties of Ta2O5film prepared by magnetron sputtering

“…Researchers have prepared Ta 2 O 5 films by various methods, such as sputtering, [5] thermal oxidation, [6] low-pressure chemical vapor deposition (LPCVD), [7] anodization, [8] and atomic layer deposition (ALD). [9] Although uniform, dense Ta 2 O 5 film can be obtained by the thermal oxidation of tan-talum in oxygen ambience, the thermal oxidation method has some shortcomings, such as high process temperature, slow oxidation rate, and relatively long temperature ramping time.…”