Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices

Tang, Kea-Tiong; Wei, Weichen; Yeh, Zuo-Wei; Hsu, Tzu-Hsiang; Chiu, Yen-Cheng; Xue, Cheng-Xin; Kuo, Yu-Chun; We, Tai-Hsing; Ho, Mon−Shu; Lo, Chung-Chuan; Liu, Ren-Shuo; Hsieh, Chih-Cheng; Chang, Meng‐Fan

doi:10.23919/vlsit.2019.8776560

2019 Symposium on VLSI Technology 2019

DOI: 10.23919/vlsit.2019.8776560

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Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices

Kea-Tiong Tang

Weichen Wei

Zuo-Wei Yeh

et al.

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Cited by 6 publications

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In‐Sensor Computing: Materials, Devices, and Integration Technologies

Wan

Shao

et al. 2022

Advanced Materials

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The number of sensor nodes in the Internet of Things is growing rapidly, leading to a large volume of data generated at sensory terminals. Frequent data transfer between the sensors and computing units causes severe limitations on the system performance in terms of energy efficiency, speed, and security. To efficiently process a substantial amount of sensory data, a novel computation paradigm that can integrate computing functions into sensor networks should be developed. The in‐sensor computing paradigm reduces data transfer and also decreases the high computing complexity by processing data locally. Here, the hardware implementation of the in‐sensor computing paradigm at the device and array levels is discussed. The physical mechanisms that lead to unique sensory response characteristics and their corresponding computing functions are illustrated. In particular, bioinspired device characteristics enable the implementation of the functionalities of neuromorphic computation. The integration technology is also discussed and the perspective on the future development of in‐sensor computing is provided.

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In‐Sensor Computing: Materials, Devices, and Integration Technologies

Wan

Shao

et al. 2022

Advanced Materials

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A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

et al. 2020

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A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices

Hung¹,

Xue²,

Kao³

et al. 2021

Nat Electron

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Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices

Cited by 6 publications

References 0 publications

In‐Sensor Computing: Materials, Devices, and Integration Technologies

In‐Sensor Computing: Materials, Devices, and Integration Technologies

A CMOS-integrated compute-in-memory macro based on resistive random-access memory for AI edge devices

A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices

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