Conduction mechanism and origin of stress-induced leakage current in thin silicon dioxide films

Abstract

The conduction mechanism and origin of the electrical stress-induced leakage current (SILC) in thin silicon dioxide (SiO2) films thermally grown on silicon substrate were clarified from various electrical properties. The properties examined consisted of the I-V characteristics, the oxide trap charge buildup, the generation of the Si/SiO2 interface states, and the generation of the neutral oxide traps. The electrical properties were obtained from films of different oxide thicknesses fabricated by different oxidation processes. The conduction mechanism of SILC was investigated from the viewpoint of oxide thickness dependence, using 92- and 56-Å-thick oxide films. From the oxide-thickness-dependent studies it was found that the SILC phenomenon was not correlated with the oxide trap charge buildup and interface state generation, but rather closely correlated with neutral electron trap generation. The conduction mechanism for nonequilibrium SILC was theoretically deduced from one-dimensional ballistic triangular barrier tunneling that occurred only during the filling process. The tunneling was directed from a leakage spot at the electron-injecting cathode to neutral electron trap sites uniformly generated within the oxide at a trap level (≊1.17 eV from the cathode conduction band and ≊2.0 eV from the SiO2 conduction band) lower than the SiO2 barrier height during only the filling process. The origin of the SILC was also investigated from the viewpoint of oxidation process dependence, using both wet and dry oxides of 86 and 50 Å thicknesses. The oxidation-process-dependent studies revealed that the SILC associated with a wet oxide after the stress application was less than that of a stressed dry oxide. The oxide trap charge buildup and the interface state generation associated with a wet oxide after the stress application was, however, greater than that of a stressed dry oxide. This result suggested that the SILC originated not from water-related chemical reactions, but from the distortion of the thermally grown SiO2 bond structure during electrical stressing. The SILC of both wet and dry oxides after the application of stress were well fitted by Fowler-Nordheim lines, confirming that the leakage conduction mechanism is independent of the oxidation process.

Study of stress-induced leakage current (SILC) in HfO2/Dy2O3 high-κ gate stacks on germanium

“…Stress-induced leakage current (J SILC = J g -J 0 ) is defined as the increase in oxide leakage current density after a high field stress (J g ), as compared to the leakage prior to any stressing (J 0 ) [13]. Generation of SILC is also modeled by different studies [8,[12][13][14][15].…”

Influence of defects on elastic gate tunneling currents through ultrathin SiO2gate oxides: predictions from microscopic models

“…[31] predicts n vac = 1.6 × 10 12 cm −2 . Experimental estimates for densities of neutral defects depend on the history of the sample and lie typically in the 10 10 -10 13 cm −2 range [6,11,43]. The fact that the interaction between neighboring defects is negligible for our present supercells suggests that we can obtain the current density j (x; n vac ) through an oxide with an arbitrary concentration of vacancies n vac simply as…”

“…In our calculations, this is easily accomplished by rescaling the Si-Si TB interaction parameters of the two Si atoms adjacent to the vacancy. Note that there is also experimental [7,11,43] and theoretical [15,41,42] evidence for other defect levels being in an energy range relevant for resonant tunneling. Figure 3 shows the transmission coefficients T (E, x s ) through our supercell oxide model with an O vacancy near the center of the oxide, at a distance of z vac ≈ 0.51 nm from the Si-SiO 2 interface on the channel side.…”

“…One of the key microscopic mechanisms that affect gate currents is defect-assisted tunneling. It has been invoked as a possible reason for stress-induced leakage currents [2][3][4][5][6] through elastic [7][8][9][10][11] as well as inelastic [12][13][14][15][16] channels. In thin oxides, the origin of soft breakdown phenomena [17][18][19][20][21][22] is also believed to be related to localized defects.…”

Spatial and energetical profiles of defects extracted from ultra-low level trap-assisted leakage current in non-volatile floating thin tunnel oxide memory devices by using direct and floating gate technique measurements

“…Correlations between SILC currents and data retention times are not yet fully established and modeled. Moreover, even though SILC has been studied a lot during the past years [1][2][3][4][5][6][7][8][9], a general consensus concerning the origins of these leakage currents is not yet established.…”