Concepts of Enterprise Systems Architecture/370

Plambeck, K. E.

doi:10.1147/sj.281.0039

Cited by 9 publications

(2 citation statements)

References 5 publications

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“…The ASN selects an ASN-second-table entry (ASTE) containing an STD that is loaded into CR1 as its new primary STD during the transfer of control. The dual-address-space facility and the enhancements to it introduced in ESA/370 are extensively described in Reference [7].…”

Section: Dual-address-space Facilitymentioning

confidence: 99%

Development and attributes of z/Architecture

et al. 2002

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The IBM z/Architecture TM instruction set architecture (ISA) is an extension of the IBM Enterprise Systems Architecture/390 ® (ESA/390) ISA and features 64-bit general registers, 64-bit operations, and 64-bit virtual and real addressing. In addition, z/Architecture includes new instructions to optimize the handling of modern multi-byte character encodings and to improve the performance of programs written in high-level languages. It provides compatibility for ESA/390 application programs and increases the ease of development of new application programs. This paper presents an overview of the interesting aspects of z/Architecture and some of the associated decisions and tradeoffs made in its development. Addressing and other history The z/Architecture [1] continues a succession of architectures for IBM's large computers: the System/360* (1964), System/370* (1970), System/370 Extended Architecture (370-XA, 1983), Enterprise Systems Architecture/370* (ESA/370, 1988), and Enterprise Systems Architecture/390* (ESA/390, 1990) [2] ISAs. The principal evolutionary trait of the processor-related advances in this series has been an increase in both the storage usable by an individual application program and the main storage that can be attached to a model and shared by many programs being executed concurrently. The z/Architecture increases the 31-bit virtual and real (for main storage) address sizes of 370-XA, ESA/370, and ESA/390 to 64 bits, a size large enough to address approximately 1.8 ϫ 10 19 bytes (16 exabytes) of either a single virtual address space or the total main storage of the machine. This is 1.1 ϫ 10 12 times as much storage as is supported by ESA/390! In System/360 through ESA/390, addressing proceeded from 24 bits to 31 bits for all addresses, with transitional support for 26-bit addressing of main storage. The dualaddress-space facility initiated in System/370 and the access registers initiated in ESA/370 increased addressing horizontally by allowing multiple address spaces to be addressed concurrently. The architectures leading to ESA/370 are discussed in References [3-6], and ESA/370 is discussed in Reference [7].

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Section: Dual-address-space Facilitymentioning

confidence: 99%

Development and attributes of z/Architecture

et al. 2002

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confidence: 99%