Computational sprinting on a hardware/software testbed

Abstract

CMOS scaling trends have led to an inflection point where thermal constraints (especially in mobile devices that employ only passive cooling) preclude sustained operation of all transistors on a chipa phenomenon called "dark silicon." Recent research proposed computational sprinting-exceeding sustainable thermal limits for short intervals-to improve responsiveness in light of the bursty computation demands of many media-rich interactive mobile applications. Computational sprinting improves responsiveness by activating reserve cores (parallel sprinting) and/or boosting frequency/voltage (frequency sprinting) to power levels that far exceed the system's sustainable cooling capabilities, relying on thermal capacitance to buffer heat.Prior work analyzed the feasibility of sprinting through modeling and simulation. In this work, we investigate sprinting using a hardware/software testbed. First, we study unabridged sprints, wherein the computation completes before temperature becomes critical, demonstrating a 6.3× responsiveness gain, and a 6% energy efficiency improvement by racing to idle. We then analyze truncated sprints, wherein our software runtime system must intervene to prevent overheating by throttling parallelism and frequency before the computation is complete. To avoid oversubscription penalties (context switching inefficiencies after a truncated parallel sprint), we develop a sprint-aware task-based parallel runtime. We find that maximal-intensity sprinting is not always best, introduce the concept of sprint pacing, and evaluate an adaptive policy for selecting sprint intensity. We report initial results using a phase change heat sink to extend maximum sprint duration. Finally, we demonstrate that a sprint-and-rest operating regime can actually outperform thermally-limited sustained execution.

Experimental Validation of a Detailed Phase Change Model on a Hardware Testbed

“…PCM has been proposed to extend sprinting duration in this context and a simple PCM model has been used to simulate the benefits of PCM. The follow up of this work verifies the feasibility of computational sprinting on a hardware/software testbed [2]. The concept of sprint pacing is intro-duced in this work, which is switching to lower intensity sprinting mode when half of the PCM has melted.…”

“…The second group of work centers around designing performance boosting policies that exploit the PCM properties [1][2][3][4]. Raghavan et al introduce computational sprinting, exceeding the TDP of the processor temporarily to respond to short durations of intense computation.…”

“…To address the challenge of implementing thermal efficiency without using active cooling, Phase Change Materials (PCMs) have been used as a passive cooling solution [1][2][3][4]. PCM can store large amounts of heat, referred to as latent heat, during phase change at a close-to-constant temperature.…”

“…In computational sprinting the system temporarily exceeds its Thermal Design Power (TDP) to respond to short bursts of intense computation. In this context, PCM has been used to extend sprinting duration for higher performance gains [1][2][3][4]. For the design and realistic evaluation of management strategies leveraging PCM, having an accurate PCM model is essential.…”

“…A significant portion of the existing work on PCM-oriented thermal management relies on simpler phase change models [1,3]. Other work in the area demonstrates the benefits of PCM on a thermal test chip [4], or on a testbed [2]. Having a testbed has many advantages in terms of showing the applicability of the proposed strategies and including the real-life effects that are hard to capture in a simulation environment.…”