Comprehensive Understanding of the HZO-based n/pFeFET Operation and Device Performance Enhancement Strategy

Oxygen Scavenging in HfZrOx‐Based n/p‐FeFETs for Switching Voltage Scaling and Endurance/Retention Improvement

“…The increase in MW according to the retention time occurs as trapped electrons by the positive pulse applied during PGM operation are gradually de-trapped. [3,25] The ΔV th values at the retention time of 1000 s after the PGM operation were 0.81 and 0.26 V (Figure 6c) in the devices without and with scavenging, respectively, corresponding to de-trapped electrons of 6.6 × 10 12 and 2.7 × 10 12 cm −2 . It suggests that electron trapping itself was alleviated by oxygen scavenging.…”

“…The presence of IL causes several critical problems in ferroelectric behavior, inducing a significant amount of charge trapping, [3,4] causing a huge gate voltage (V g ) drop due to a lower dielectric constant (≈3.9), [5] and forming a strong depolarization field. [5,6] In particular, the interfacial charge trap density of ≈10 12 cm −2 is involved in breakdown and fatigue induced by charge trapping, [3,4] which causes issues of low endurance and read delay in FeFETs. [3,4,7] On the other hand, beneficial effects such as charge-assisted polarization [8] and leakage reduction [9] by IL are also exerted.…”

“…[1,2] However, when the HZO film is directly stacked on the Si substrate, an unintentional interfacial layer (IL) of SiO x is formed, resulting in a metal/ferroelectric film/insulator/semiconductor (MFIS) structure. The presence of IL causes several critical problems in ferroelectric behavior, inducing a significant amount of charge trapping, [3,4] causing a huge gate voltage (V g ) drop due to a lower dielectric constant (≈3.9), [5] and forming a strong depolarization field. [5,6] In particular, the interfacial charge trap density of ≈10 12 cm −2 is involved in breakdown and fatigue induced by charge trapping, [3,4] which causes issues of low endurance and read delay in FeFETs.…”

Improved Ferroelectricity in Cryogenic Phase Transition of Hf0.5Zr0.5O2

“…xcellent ferroelectricity demonstrated in the doped-HfO2 mixtures [1] shed light on emerging non-volatile memories [2][3][4] with CMOS compatibility [5]. The evolution toward cryo-CMOS circuits and quantum computing systems may lead to the need of cryogenic non-volatile ferroelectric (Fe) memory [6].…”

Dielectric-Engineered High-Speed, Low-Power, Highly Reliable Charge Trap Flash-Based Synaptic Device for Neuromorphic Computing beyond Inference

“…A quasi-static split C–V (QSCV) measurement was utilized to investigate the trapping/detrapping behavior of the carrier at the specific bias during the gradual increase of the bias (see Figure S3, Supporting Information for a detailed setup for the QSCV measurement) . Note that to exclude the trapping/detrapping behavior at the MOS interface, we applied a double triangular pulse and used the subtracted drain current ( I D ) by the second triangular pulse from the first one for gate capacitance ( C g ) estimation . Using relation C = I /(d V /d t ), the C – V curve from the devices was achieved.…”