Compositional Analysis Framework Using EDP Resource Models

Abdelzaher, Tarek; Fohler, Gerhard; Kuo, Tei-Wei

doi:10.1109/rtss.2007.36

Cited by 131 publications

(182 citation statements)

References 23 publications

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“…where u k ∈ (0, 1] and σ k ≥ 0. u k is called the processor bandwidth and σ k the maximum blackout time, because σ k is the maximum interval when processor k may not provide any supply (Easwaran et al, 2007).…”

Section: Definition 3 (Supply Functions)mentioning

confidence: 99%

A hierarchical multiprocessor bandwidth reservation scheme with timing guarantees

Leontyev

Anderson

2009

Real-Time Syst

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A multiprocessor scheduling scheme is presented for supporting hierarchical containers that encapsulate sporadic soft and hard real-time tasks. In this scheme, each container is allocated a specified bandwidth, which it uses to schedule its children (some of which may also be containers). This scheme is novel in that, with only soft real-time tasks, no utilization loss is incurred when provisioning containers, even in arbitrarily deep hierarchies. Presented experiments show that the proposed scheme performs well compared to conventional real-time scheduling techniques that do not provide container isolation.

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Section: Definition 3 (Supply Functions)mentioning

confidence: 99%

A hierarchical multiprocessor bandwidth reservation scheme with timing guarantees

Leontyev

Anderson

2009

Real-Time Syst

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“…Among the existing analyses, the closest analysis that could be applied to our model is the response-time analysis for a single-switch architecture (Santos et al 2011), which is based on Explicit Deadline Periodic (EDP) resource model (Easwaran et al 2007). …”

Section: Response Time Analysis Of Messagesmentioning

confidence: 99%

Designing end-to-end resource reservations in predictable distributed embedded systems

et al. 2017

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Contemporary distributed embedded systems in many domains have become highly complex due to ever-increasing demand on advanced computer controlled functionality. The resource reservation techniques can be effective in lowering the software complexity, ensuring predictability and allowing flexibility during the development and execution of these systems. This paper proposes a novel end-to-end resource reservation model for distributed embedded systems. In order to support the development of predictable systems using the proposed model, the paper provides a method to design resource reservations and an end-to-end timing analysis. The reservation design can be subjected to different optimization criteria with respect to runtime footprint, overhead or performance. The paper also presents and evaluates a case study to show the usability of the proposed model, reservation design method and end-to-end timing analysis.

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“…Observe that the partial processor of µ is represented by a single-processor periodic resource model Ω = (Π, Θ) [22]. (However, it can also be represented by any other single processor resource model, such as EDP model [11].) Based on this characteristic, we can easily derive the worst-case supply pattern of µ (shown in Figure 2) and its supply bound function, which is given by the following lemma:…”

Section: Deterministic Multiprocessor Resource Model (Dmpr)mentioning

confidence: 99%

Cache-aware compositional analysis of real-time multicore virtualization platforms

Phan

Sokolsky

et al. 2015

Real-Time Syst

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Multicore processors are becoming ubiquitous, and it is becoming increasingly common to run multiple realtime systems on a shared multicore platform. While this trend helps to reduce cost and to increase performance, it also makes it more challenging to achieve timing guarantees and functional isolation.One approach to achieving functional isolation is to use virtualization. However, virtualization also introduces many challenges to the multicore timing analysis; for instance, the overhead due to cache misses becomes harder to predict, since it depends not only on the direct interference between tasks but also on the indirect interference between virtual processors and the tasks executing on them.In this paper, we present a cache-aware compositional analysis technique that can be used to ensure timing guarantees of components scheduled on a multicore virtualization platform. Our technique improves on previous multicore compositional analyses by accounting for the cache-related overhead in the components' interfaces, and it addresses the new virtualization-specific challenges in the overhead analysis. To demonstrate the utility of our technique, we report results from an extensive evaluation based on randomly generated workloads. Abstract-Multicore processors are becoming ubiquitous, and it is becoming increasingly common to run multiple real-time systems on a shared multicore platform. While this trend helps to reduce cost and to increase performance, it also makes it more challenging to achieve timing guarantees and functional isolation.One approach to achieving functional isolation is to use virtualization. However, virtualization also introduces many challenges to the multicore timing analysis; for instance, the overhead due to cache misses becomes harder to predict, since it depends not only on the direct interference between tasks but also on the indirect interference between virtual processors and the tasks executing on them.In this paper, we present a cache-aware compositional analysis technique that can be used to ensure timing guarantees of components scheduled on a multicore virtualization platform. Our technique improves on previous multicore compositional analyses by accounting for the cache-related overhead in the components' interfaces, and it addresses the new virtualizationspecific challenges in the overhead analysis. To demonstrate the utility of our technique, we report results from an extensive evaluation based on randomly generated workloads.

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Compositional Analysis Framework Using EDP Resource Models

Cited by 131 publications

References 23 publications

A hierarchical multiprocessor bandwidth reservation scheme with timing guarantees

A hierarchical multiprocessor bandwidth reservation scheme with timing guarantees

Designing end-to-end resource reservations in predictable distributed embedded systems

Cache-aware compositional analysis of real-time multicore virtualization platforms

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