Abstract:Factor important in attaining higher n‐type conductivity on implanting
normalGaAs
have been investigated. These are reflected in a comparison of Group IV and VI dopants where the difference in behavior can be ascribed to the different sublattice occupation. The importance of Ga outdiffusion with
SiO2
encapsulated layers is seen on incorporating Ga within the oxide prior to initiating any heat‐treatment. For sulfur, the electrical activity is doubled by the presence of the oxide gallium. Such an oxide is… Show more
“…of Si impurity was found to be independent of implant temperature (12,17) and therefore the data for low and high implant temperatures were both used together. Similarly, annealing time and annealing method (capped or CAT) for Si implantation (43,54) were not considered as variables.…”
“…Selenium activation efficiency.=The ~ of Se was found to depend markedly on implant temperature (12,13,(16)(17)(18)(19)(20)(21)(22). The data for all implant temperature greater than 150~ were used together because of insufficient number of data points available for each temperature and because of the small dependence of V on T~ in the temperature region.…”
Empirical models have been developed for predicting the carrier distributions after ion implantation and annealing process steps used in
normalGaAs
device fabrication. The present models predict the carrier distributions for n‐type
normalGaAs
using Si and Se as the dopants. The simulation is done by using the atomic profile and activation efficiency models developed in this study. These models are based on SIMS and measured carrier concentration profile studies reported in the literature. The model for atomic distribution provides a gaussian profile for Si and a joined half‐gaussian one for Se using the projected range and standard deviation parameters obtained from SIMS studies. The effect of radiation enhanced diffusion is taken into account. Impurity diffusion during annealing for temperatures up to 920°C for Si and 1000°C for Se is neglected. Volumetric concentration has been properly chosen as a canonical parameter for obtaining activation efficiency. The universal activation efficiency plots for each dopant species give percentage activation efficiency as a function of atomic concentration (cm−3) at different annealing temperatures.
“…of Si impurity was found to be independent of implant temperature (12,17) and therefore the data for low and high implant temperatures were both used together. Similarly, annealing time and annealing method (capped or CAT) for Si implantation (43,54) were not considered as variables.…”
“…Selenium activation efficiency.=The ~ of Se was found to depend markedly on implant temperature (12,13,(16)(17)(18)(19)(20)(21)(22). The data for all implant temperature greater than 150~ were used together because of insufficient number of data points available for each temperature and because of the small dependence of V on T~ in the temperature region.…”
Empirical models have been developed for predicting the carrier distributions after ion implantation and annealing process steps used in
normalGaAs
device fabrication. The present models predict the carrier distributions for n‐type
normalGaAs
using Si and Se as the dopants. The simulation is done by using the atomic profile and activation efficiency models developed in this study. These models are based on SIMS and measured carrier concentration profile studies reported in the literature. The model for atomic distribution provides a gaussian profile for Si and a joined half‐gaussian one for Se using the projected range and standard deviation parameters obtained from SIMS studies. The effect of radiation enhanced diffusion is taken into account. Impurity diffusion during annealing for temperatures up to 920°C for Si and 1000°C for Se is neglected. Volumetric concentration has been properly chosen as a canonical parameter for obtaining activation efficiency. The universal activation efficiency plots for each dopant species give percentage activation efficiency as a function of atomic concentration (cm−3) at different annealing temperatures.
“…Therefore it is necessary to encapsulate the sample with a suitable dielectric layer or to perform the annealing in a carefully controlled ambient. There have been numerous reports on the encapsulants of Si-implanted GaAs, that is, large doping efficiency using pyrolytic Si3N4 passivating film (7), superiority of SiO2 passivating film (8), and capless annealing without using dielectric encapsulant (9). However, few investigations have been reported on the effects of encapsulation on the carrier concentration profiles of Si-implanted GaAs.…”
GATE dently make an estimate of the accuracy of the final solution.Computers.--Computations were performed on the Cray-1 at Bell Laboratories, Murray Hill. A Honeywell 6000 was used as the host computer to the Cray-1. A DEC Vax was used for file maintenance: files were sent from the Vax to the Cray-1 via the Honeywell; output files were returned in the same manner to the Vax. Calculations typically took between 150 and 300 sec of Cray-1 time.
ABSTRACTThe effects of encapsulation on the carrier concentration profiles of Si implanted into GaAs have been studied. Large differences were found in the carrier concentration profiles among the materials used for the annealing cap. Diffusion of Si was enhanced by SiO2 encapsulation but was negligibly small with Si3N4 encapsulation and capless. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.192.114.19 Downloaded on 2015-06-19 to IP
“…Implantation is considered to be an attractive alternative to diffusion for the creation of thin heavily doped n-type regions in GaAs (1)(2)(3)(4)(5)(6)(7)(8)(9)(10)(11)(12)(13)(14)(15). We have utilized ion implantation to fabricate high-low READ GaAs IMPATT diodes (6) and state-of-the-art Ka-band GaAs Gunn effect diodes (7).…”
mentioning
confidence: 99%
“…These include sealing the GaAs both with and without a dielectric encapsulant in evacuated quartz ampuls prior to annealing (4,8). The encapsulants have included SiO2 (3,4,6,9), Si3N4 (8,9), A12Oa (11,12), and Ga-doped SiQ (13,14). However various problems associated with uncontrolled contamination and interdiffusion at the encapsulant-GaAs interface have been noted (15).…”
Implantation is considered to be an attractive alternative to diffusion for the creation of thin heavily doped n-type regions in GaAs (1-15). We have utilized ion implantation to fabricate high-low READ GaAs IMPATT diodes (6) and state-of-the-art Ka-band GaAs Gunn effect diodes (7). However, the results reported to date indicate that, in general, the doping efficiencies of the n-type implanted species are low unless long annealing periods are used. Lengthy annealing times are unattractive because diffusion tends to excessively broaden the impurity doping gradients and thus impair device performance. Even for short anneal times within the range of commonly used annealing temperatures, 700~176it is necessary to take special precautions to minimize erosion of the GaAs surfaces. A variety of approaches have been used. These include sealing the GaAs both with and without a dielectric encapsulant in evacuated quartz ampuls prior to annealing (4, 8). The encapsulants have included SiO2 (3, 4, 6, 9), Si3N4 (8, 9), A12Oa (11, 12), and 14). However various problems associated with uncontrolled contamination and interdiffusion at the encapsulant-GaAs interface have been noted (15).This paper describes the results of substituting a controlled atmosphere for the dielectric encapsulant to protect the GaAs surface during high temperature anneals. Epitaxial materials technology has demonstrated that polished substrates can be maintained at elevated temperature with minimal surface degradation in a flowing high purity hydrogen atmosphere. Taking advantage of this experience, an anneal system was designed which utilizes a controlled atmosphere of high purity hydrogen (He) in conjunction with an arsenic (As) source to protect the GaAs surface during annealing. The system was used to anneal epitaxial GaAs films implanted with either silicon ions or sulfur ions to create thin, highly doped n-type layers. The epitaxial surfaces exhibited no degradation after anneals at 800~ for 20 min. The electrical results indicate that the apparent electrical conversion efficiencies achieved for the implanted layers were as high as 85% for the 800~ 20 min anneal.
ExperimentalThe GaAs epitaxial material used in this investigation was grown by the He-Ga-AsCts vapor phase technique on heavily Te-doped n+-substrates oriented 3 ~ Off the <100> toward the <111>. The epitaxial layers were doped with sulfur and were electrically uniform in depth with net donor concentrations within the range 2-8 X 1015 cm -~. The epitaxial layers were implanted at room temperature with either 120 keV silicon ions or 140 keV sulfur ions. In the case of the silicon implants it was concluded after careful analysis of the separated ion spectrum that the implanted species was 28Si+ with less than 1% of other possible molecular components (e.g., N2+). To minimize channeling effects, the GaAs lattice was oriented to appear random to the incident ion beam. Under this condition, a first order approximation to the implanted ion distribution is Gaussian with a mean projected range Rp...
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