GATE dently make an estimate of the accuracy of the final solution.Computers.--Computations were performed on the Cray-1 at Bell Laboratories, Murray Hill. A Honeywell 6000 was used as the host computer to the Cray-1. A DEC Vax was used for file maintenance: files were sent from the Vax to the Cray-1 via the Honeywell; output files were returned in the same manner to the Vax. Calculations typically took between 150 and 300 sec of Cray-1 time. ABSTRACTThe effects of encapsulation on the carrier concentration profiles of Si implanted into GaAs have been studied. Large differences were found in the carrier concentration profiles among the materials used for the annealing cap. Diffusion of Si was enhanced by SiO2 encapsulation but was negligibly small with Si3N4 encapsulation and capless. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 128.192.114.19 Downloaded on 2015-06-19 to IP

A new rapid thermal annealing (RTA) method that uses GaAs guard rings has been developed. A new temperature monitoring method is also described. Generations of slip lines on 2-in.-diam GaAs wafers annealed in different kinds ofRTA arrangements were investigated by x-ray transmission topography. The use of three GaAs guard rings has been found to be very effective in reducing slip lines. The temperature dependence of activation and uniformity of annealing characteristics for a selective Si-implanted 2-in.-diam GaAs wafer at 100 ke V with a dose of 5 X 10 12 em -2 were evaluated by drain saturation current (Idss) distribution of gateless field-effect transistors (FETs) over the wafer. The best uniformity, as well as the highest activation, was obtained by RTA at 920°C for 15 s, The activation energy of 1.47 eV for the average value of Idss ( Idss) was obtained. By using this RTA method, GaAs digital integrated circuits (ICs), dual-modulus prescalers, have been successfully fabricated with high yield for the first time. This RTA method is very promising for GaAs digital IC processing.

We have investigated fundamental electrical characteristics of GaAs implanted with SiFx and SFx (x=1, 2, and 3) molecular ions at energies which give the same dopant atom (Si or S) ion ranges. Three kinds of annealing methods were compared. Characterization of these implanted GaAs layers was carried out by the Hall effect, capacitance-voltage, and secondary ion mass spectrometry measurements.

Angular dependent core-level X-ray photoelectron spectra measurement has been performed for native oxide of single crystal GaAs wafer and proved to be a useful method for obtaining chemical state depth profile near the surface. Metallic arsenic is buried in a growing native oxide layer and stranded at the interface layer of oxide and GaAs substrate.

High-current driving strained N-A1 27Ga0 73A~ /In Ga As /N-A1 Ga As seleceively-doped dougl~~he?&junctionoF@s fh% been fabricated using highly conductive epitaxial layers grown by MBE. The maximum drain current of 600 m A / m m and high transconductance values of 350 -470 mS/mm at drain currents of 330 -400 mA/mm were obtained for 0.5,um gate FETs. The strained doubleheterojunction structures showed high sheetl2 electron concentrations well exceeding 3x10 /cmand sheet resistance of 260 -320 ohm, which is one third that for conventional GaAs/N-AlGaAs singlehetero-junction structures. Because of large band offset at the bottom heterointerface, short channel effects were greatly reduced. Consequently, the decrease of threshold voltage due to the reduction of gate length from 5 p to 0.5 p n was only 0.2 V and the drain conductance for 0.5,um-gate FET was less than 10 mS/mm.