Comparative Study on Random Interface Traps-Induced Reliability of NC-FinFETs and FinFETs

Lü, Weifeng; Zhang, Caiyun; Chen, Dengke; Han, Ying; Wei, Weijie

doi:10.1007/s12633-023-02371-0

Cited by 3 publications

(2 citation statements)

References 32 publications

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“…The immunity of GSI-NWM against aging and hot carrier effects is a crucial factor that needs to be addressed because the reliability of the proposed structure can be affected by various factors that can cause degradation in their performance [60][61][62]. Aging effects result in performance degradation and, eventually, failure of circuits.…”

Section: Effect Of Doping On Analog Performance Evaluation Characteri...mentioning

confidence: 99%

Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET

et al. 2023

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This paper critically investigates the effect of doping on different device characteristics of a Ge/Si interfaced nanowire MOSFET (GSI-NWM) for analog performance enhancement. The doping of source, channel, and drain has a prominent effect on important device characteristics, which has been investigated through DC and AC analysis performed on the SILVACO TCAD simulator. A numerical computational-based simulation study has been used to investigate the modulation of various device characteristics, such as threshold voltage, cut-off frequency, subthreshold swing, MTPG, current ratio, channel resistance, and transconductance. The investigation revealed a strong dependence of most of these characteristics on the source, channel, and drain doping levels, providing valuable insights into device performance. Proper optimization in doping can significantly improve the performance of the device. A compact physics-based analytical model has been mathematically evaluated and proposed in this work, showing an excellent in-line agreement with the simulated results. This is a novel approach for improving the analog performance parameters of a nanowire MOSFET through doping optimization, which incorporates gate oxide stacking and germanium as a source material. In this work, the biosensing capability of the GSI-NWM has also been discussed and evaluated.

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Section: Effect Of Doping On Analog Performance Evaluation Characteri...mentioning

confidence: 99%

Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET

et al. 2023

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“…It has been concluded by the author that dopingless devices are superior candidate for designing aging-resilient and more reliable circuits. One of the researchers Lu et al [21] have investigated the electrical characteristics fluctuations induced by random interface traps and compared the results with negative capacitance FinFET's. In this paper, the detailed performance analysis has been studied on core-shell junctionless field effect transistor after incorporating such effects and compared with classical simulations.…”

Section: Introductionmentioning

confidence: 99%

Quantum and classical simulation of core shell based junctionless field effect transistor with digital application

Mehta,

Kumar Arya,

Sharma

2024

Eng. Res. Express

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The detailed performance analysis of Core Shell Gate All Around junctionless field effect transistor along with CMOS inverter as an application with quantum models is presented in this paper for the first time. To appreciate the performance of the device and the application even at smaller channel length, the comparison with classical models is also presented. The OFF current was calculated as 3.6810-16A on incorporating the quantum models. The subthreshold swing (SS) and Drain induced barrier lowering (DIBL) are found to be near ideal values. The SS and DIBL was calculated as 62.82mV/dec and 33.4mV/V. The DIBL was found to be lesser by 52.82% with quantum model than classical model. The performance obtained using quantum models are better than the classical models in terms of different parameters such as OFF current, ON current, SS, DIBL, threshold voltage, transconductance. Further, the performance of the CMOS inverter with quantum models by considering the n-type and p-type Core Shell Gate All Around junctionless field effect transistor is also presented . The OFF current of p-type and n-type was matched before designing the application. A sharp transfer characteristics of the CMOS inverter is obtained. The performance was also studied by calculating the drain current from each of p-type and n-type and found to be more than 110-7A and SNM (Static Noise Margin) was calculated as 267mV. The transient response of CMOS inverter exhibits the potential of CMOS inverter using the proposed device even at smaller channel lengths.

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Interface traps in the sub-3 nm technology node: A comprehensive analysis and benchmarking of negative capacitance FinFET and nanosheet FETs - A reliability perspective from device to circuit level

Valasa,

Kotha,

Vadthiya

2024

Microelectronics Reliability

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Comparative Study on Random Interface Traps-Induced Reliability of NC-FinFETs and FinFETs

Cited by 3 publications

References 32 publications

Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET

Analytical modeling and doping optimization for enhanced analog performance in a Ge/Si interfaced nanowire MOSFET

Quantum and classical simulation of core shell based junctionless field effect transistor with digital application

Interface traps in the sub-3 nm technology node: A comprehensive analysis and benchmarking of negative capacitance FinFET and nanosheet FETs - A reliability perspective from device to circuit level

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