Comparative study of drain and gate low-frequency noise in nMOSFETs with hafnium-based gate dielectrics

Analytical model for the 1∕f noise in the tunneling current through metal-oxide-semiconductor structures

“…The study of 1 / f noise has been widely recognized as an important source of information on defects in solid state materials and devices. [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20] In the particular case of complementary-metal-oxide-semiconductor ͑CMOS͒ devices, a huge number of papers have been dedicated to the 1 / f noise of the channel current. [4][5][6][7][8][9][10][11][12][13] These studies agree that such noise term is caused by the trapping/detrapping of channel charge carriers into/from oxide defects, whereas there is open debate on whether the responsible physical mechanism consists of charge number fluctuations or of mobility fluctuations.…”

“…On the other hand, only a few works have been dedicated to the gate current 1 / f noise. [14][15][16][17][18][19][20] Alers et al proposed a qualitative model which ascribes the 1 / f noise to fluctuations of a trap assisted tunneling current through the oxide that causes current noise but is not evident in the I-V characteristics. 14 They suggested that this type of noise may be a more sensitive probe of the degradation in thin oxides than other measurements.…”

“…17 Recently we have reported that the gate current 1 / f noise can be used as a sensitive probe for evaluating the impact of new materials on the quality of the gate stack in CMOS devices. [14][15][16][17][18][19][20] There are some advantages in using gate current 1 / f noise measurements with respect to the other standard electrical techniques for dielectric quality characterization ͑low frequency-high frequency C-V, charge pumping, drain current 1 / f noise measurements͒: ͑i͒ the large gate leakage of the modern CMOS devices with ultrathin gate dielectric degrades the accuracy of all the other methods, while it represents the source of information in the case of gate current 1 / f noise; ͑ii͒ metal-oxidesemiconductor ͑MOS͒ capacitors can be used as test vehicles, whereas other methods such as the charge pumping and the one based on the drain current 1 / f noise measurements require MOS-field-effect-transistor ͑MOSFET͒ devices; ͑iii͒ the proposed technique can be used also with very small devices with ultrathin dielectric, whereas the method based on C-V measurements requires large area samples or dedicated rf test structures. 24 Nevertheless, the applicability of this characterization technique is limited by the lack of simple analytical models able to relate the gate 1 / f noise to physical quantities of the MOS structure.…”

Enhanced bias stress stability of a-InGaZnO thin film transistors by inserting an ultra-thin interfacial InGaZnO:N layer

“…According to the established LFN theory, a slope of À2 here indicates that the main source of LFN can be attributed to carrier number fluctuation, which is caused by tunneling of free-charge carriers into the oxide traps at the channel/gate dielectric interface region. 13,14 Moreover, it has been suggested that if carrier number fluctuation is the dominant LFN source, the average interfacial trap density within the gate oxide can be extracted as 15…”

On the dc and noise properties of the gate current in epitaxial Ge p-channel metal oxide semiconductor field effect transistors with TiN∕TaN∕HfO2∕SiO2 gate stack

“…3, 8,9 Hf based as well as diffused Ge related defects can cause serious reliability issues such as threshold voltage instability, bias temperature instability, and trap assisted tunneling. 10 In this letter, we investigate the quality of a TiN / TaN / HfO 2 / SiO 2 gate stack on epi-Ge pMOSFETs through measurements of the dc and the noise characteristics of the gate current.…”