Compact Modeling of Dynamic MOSFET Degradation Due to Hot-Electrons

Tanoue, H.; Tanaka, Akihiro; Oodate, Y.; Nakahagi, Takeshi; Sugiyama, Daisuke; Ma, Chenyue; Mattausch, Hans Jürgen; Miura-Mattausch, Mitiko

doi:10.1109/tdmr.2017.2655519

Cited by 10 publications

(1 citation statement)

References 28 publications

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“…There are series of papers that follow changes of interface traps over time. [39][40][41][42][43][44] These papers focused on negative bias temperature instability and hot carrier degradation, and follow trap dynamics in stress time scales. There are another series of papers concerning the compact modeling which successfully describe measured dynamical change of terminal currents affected by traps.…”

Section: Introductionmentioning

confidence: 99%

A time-dependent Verilog-A compact model for MOS capacitors with interface traps

Fukuda

Asai

Hattori

et al. 2019

Jpn. J. Appl. Phys.

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A modeling method to analyze transient behaviors of MOS capacitors including interface traps by circuit simulation is proposed. Through applications to GaN MOS capacitors, plateau, frequency dispersion, and hysteresis are obtained as typical trap influences on C–V characteristics. Examples of more complicated cases are demonstrated, including the influence of the energy distribution of the trap, cases with multiple peaks in the trap energy distribution, cases where resistors are connected in series as a circuit. Through these examples, it is expected that this modeling method using circuit simulation will be useful for modeling experimental results of trap-affected MOS capacitors.

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