2012
DOI: 10.1016/j.sse.2012.04.014
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CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs

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Cited by 42 publications
(33 citation statements)
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“…4(a) delaminate and the contact resistance increases rapidly. Similar contact resistance degradation at around this temperature has also been observed in the Ni-InGaAs contact system [19], [20]. In 6 sets of test structures consisting of a total of 72 CTLMs, the average ρc obtained after 350 °C anneal is 4.5•10 [17].…”
Section: Ni Ohmic Contacts and Nano-tlm Characterizationsupporting
confidence: 71%
“…4(a) delaminate and the contact resistance increases rapidly. Similar contact resistance degradation at around this temperature has also been observed in the Ni-InGaAs contact system [19], [20]. In 6 sets of test structures consisting of a total of 72 CTLMs, the average ρc obtained after 350 °C anneal is 4.5•10 [17].…”
Section: Ni Ohmic Contacts and Nano-tlm Characterizationsupporting
confidence: 71%
“…4 This can put the NiInGaAs approach as a leading candidate for source and drain regions for InGaAs based devices and may allow development of novel devices thanks to its epitaxial and conductive nature. …”
Section: Discussionmentioning
confidence: 99%
“…One option for such regions is the silicide-like compound formed by solid state reaction between Ni and InGaAs; this approach holds also the advantage of self-alignment. [4][5][6][7] We have recently investigated this system electrically and showed a near ideal current-voltage behavior with a Schottky barrier height of 0.24 6 0.01 eV. 8 In x Ga 1Àx As based transistors with NiInGaAs S/D regions were investigated and found to function successfully with a very high peak velocity.…”
Section: Introductionmentioning
confidence: 99%
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“…This high injection velocity material is a promising candidate 20,21 for Metal Oxide Semiconductor Field Effect Transistor (MOSFET) channels. The device is made of a 10-nm-thick InGaAs QW layer composed of 10% indium.…”
mentioning
confidence: 99%