Charge trapping in alumina and its impact on the operation of metal-alumina-nitride-oxide-silicon memories: Experiments and simulations

Padovani, Andrea; Larcher, Luca; Marca, V. Della; Pavan, Paolo; Park, Hokyung; Bersuker, G.

doi:10.1063/1.3602999

Cited by 20 publications

(16 citation statements)

References 23 publications

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“…Zhu et al 2 indicated that the trapped charges located in both interface and bulk in the HfO 2 layer. Bu and White 3 found that the charges concentrated on the interface between the block and trap layer, whereas Zahid et al 4 reported that electrons aggregated in the interface between the metal gate and block Al 2 O 3 layer and those electrons could vary the threshold voltage, which was confirmed by Rao et al 5 and Padovani et al 6 Sharma et al 7 showed that the holes generated in the SiO x N y trap layer might cause the profiled electron centroid moving towards the HfO 2 block layer. Ko et al 8 pointed that oxygen interstitials or Hf vacancies, beside the oxygen vacancies, may have the important roles as the charged point defects in charge-trapping process.…”

supporting

confidence: 68%

In situ electron holography study of charge distribution in high-κ charge-trapping memory

Yao

Huo

et al. 2013

Nat Commun

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Charge-trapping memory with high-k insulator films is a candidate for future memory devices. Many efforts with different indirect methods have been made to confirm the trapping position of the charges, but the reported results in the literatures are contrary, from the bottom to the top of the trapping layers. Here we characterize the local charge distribution in the high-k dielectric stacks under different bias with in situ electron holography. The retrieved phase change induced by external bias strength is visualized with high spatial resolution and the negative charges aggregated on the interface between Al 2 O 3 block layer and HfO 2 trapping layer are confirmed. Moreover, the positive charges are discovered near the interface between HfO 2 and SiO 2 films, which may have an impact on the performance of the chargetrapping memory but were neglected in previous models and theory.

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supporting

confidence: 68%

In situ electron holography study of charge distribution in high-κ charge-trapping memory

Yao

Huo

et al. 2013

Nat Commun

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“…The m * h (for hole) and m * e (for electron) are effective masses of the Al 2 O 3 layer, which have already been reported as 0.25m 0 and 0.20m 0 [41] (note: m 0 is the electron rest mass). The S h /S e ratio is calculated to be 1.4, and the sum of Φ B,e and Φ B,h is 6.1 eV: Φ B,e + Φ B,h = 6.4 eV (energy band gap of Al 2 O 3 ) -0.3 eV (energy band gap of few-layered BP) = 6.1 eV.…”

Section: Characteristics Of 2d Bp Top Gate Cim Fetsmentioning

confidence: 99%

Nonvolatile Charge Injection Memory Based on Black Phosphorous 2D Nanosheets for Charge Trapping and Active Channel Layers

Lee

et al. 2016

Adv Funct Materials

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wileyonlinelibrary.comwould have great potential in future nanotechnologies owing to their unique properties. A considerable amount of effort has been put in to conduct fundamental studies on the material properties of 2D vdWs and to develop nanoscale electronic and optoelectronic applications. As a result, remarkable progress has been made in the field of 2D vdWs in recent years. Of the many 2D vdWs materials, transition metal dichalcogenide (TMD) semiconductors can be regarded as promising active channel materials [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16] to overcome the limitation of band gapless graphene that exhibits a strong metallic nature rather than semiconducting properties despite numerous efforts. [17][18][19] Molybdenum disulphide (MoS 2 ) [1][2][3][4][5][6][7][8] and tungsten diselenide (WSe 2 ) [9][10][11][12][13][14][15][16] are representative n-type and p-type (or p-type dominant ambipolar) TMD semiconductors, and prototypes of electronic and optoelectronic applications such as field-effect transistors (FETs), [1,2,4,6] light emitting diodes, [13] and photodiodes [14,20] have been demonstrated.The newest 2D vdWs material, known as black phosphorus (BP), was introduced in 2014. [21][22][23][24][25][26][27][28][29][30][31] BP is a single-component material like graphene; however, it has a narrow and direct band gap of 0.3 eV even in the bulk phase. Few-layered (5-10 nm) BP has an ambipolar semiconducting property with a high carrier mobility (≈1000 cm 2 V −1 s −1 ) and a reasonably high on-off current ratio (≈10 4 ). Therefore, BP 2D crystals have been generating significant interest among the research community, and they have been extensively studied. Several research groups have reported very interesting material properties of BP [22][23][24]31] and demonstrated BP-based applications such as FETs, [21,22,25,26] heterojunction p-n diodes, [27,28] and photodetectors. [29,30] However, beyond such basic unit devices, more advanced applications, e.g., logic circuits [22,32,33] or nonvolatile memory, [33,34] have been reported rarely.Here, we demonstrated charge injection memory (CIM) devices based on BP nanosheet FETs with patterned top gate geometry on a glass substrate. Few-layered BP flakes of similar thickness that were prepared by mechanical exfoliation were used as active channel and charge trapping layers. BP is known to be easily degraded by water and oxygen molecules in ambient air. In our previous study, we clearly verified the 2D van der Waals atomic crystal materials have great potential for use in future nanoscale electronic and optoelectronic applications owing to their unique properties such as a tunable energy band gap according to their thickness or number of layers. Recently, black phosphorous (BP) has attracted significant interest because it is a single-component material like graphene and has high mobility, a direct band gap, and exhibits ambipolar transition behavior. This study reports on a charge injection memory field-effect transistor on a glass substrate, where...

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“…There are reports about a fraction of the stored data residing in the Al 2 O 3 -based blocking layer. 12,[17][18][19][20] However, these works do not mention the possibility that more than one type of electron traps inside this dielectric determines the memory properties. As a consequence, care should be taken when a ten years memory window is extrapolated from short times, because the leakage could be accelerated by the participation of the slow traps.…”

Section: Effects On Tanos Performancementioning

confidence: 96%

“…It was also reported that a non-negligible fraction of the charge captured during programming occurs in the electron traps located inside the Al 2 O 3 layer. 12,[17][18][19][20] The relative contribution of Al 2 O 3 trapping to the total captured charge depends strongly on the silicon nitride/alumina thicknesses ratio (t N /t Al ), reaching a significant 25% when t N /t Al ¼ 0. 27.…”

Section: Introductionmentioning

confidence: 99%

“…12 To improve the Program/Erase (P/E) performance (erase speed and memory window closure) and data retention, Al 2 O 3 has been proposed as blocking layer, [13][14][15][16] giving rise to TaN/Al 2 O 3 /Si 3 N 4 /SiO 2 /Si (TANOS) charge-trap memories. [10][11][12][13][17][18][19][20][21][22][23][24] It has been reported that the density of as-grown electron traps in Al 2 O 3 , as other high-j dielectrics, is orders of magnitude higher than conventional SiO 2 . These traps contribute to the leakage current through the dielectric under low electric fields, due to trap-assisted-tunneling (TAT), which affects the reliability and data retention of the devices.…”

Section: Introductionmentioning

confidence: 99%

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Experimental evidence and modeling of two types of electron traps in Al2O3 for nonvolatile memory applications

Salomone

Lipovetzky

Carbonetto

et al. 2013

Journal of Applied Physics

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Al2O3-based dielectrics are currently considered as promising materials to use in nonvolatile memories. The electron trap density in this material is much higher than in conventional SiO2, being their characteristics critical for the application. Conventional capacitance-voltage (C-V) techniques were used to study the main effects of the electron traps on the electrical characteristics of MOS capacitors with atomic layer deposited Al2O3 as insulating layer. More detailed information about the trapping kinetics was obtained through the study of the constant capacitance voltage transient. Two different types of traps were found. One is responsible for the instabilities observed in C-V measurements, the other has characteristic trapping times three orders longer. A physical model is presented to explain the observed trapping kinetics exhibiting good agreement between experiments and simulations. The energy levels of the studied traps were determined at 2.2 and 2.6 eV below the Al2O3 conduction band, with densities of 2.9 × 1018 cm−3 and 1.6 × 1018 cm−3, respectively.

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Charge trapping in alumina and its impact on the operation of metal-alumina-nitride-oxide-silicon memories: Experiments and simulations

Cited by 20 publications

References 23 publications

In situ electron holography study of charge distribution in high-κ charge-trapping memory

In situ electron holography study of charge distribution in high-κ charge-trapping memory

Nonvolatile Charge Injection Memory Based on Black Phosphorous 2D Nanosheets for Charge Trapping and Active Channel Layers

Experimental evidence and modeling of two types of electron traps in Al2O3 for nonvolatile memory applications

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