Characterization of the inverse-narrow-width effect

Akers, L.A.; Sugino, M.; Ford, J.M.

doi:10.1109/t-ed.1987.23338

Cited by 36 publications

(5 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The narrow width effect (NWE) and inverse narrow width effect (INWE) cause the threshold voltage and current density variations along the channel width [6]- [9] . The conventional EGL method did not consider the narrow-width related edge effects [3] , which cannot accurately estimate the performance of the NRG circuits, especially in the sub-threshold characteristic analysis.…”

Section: Impacts Of Narrow Width Effects On Electronic Characteristicsmentioning

confidence: 99%

A transistor sizing method for standard-cell optimization considering lithography effects

Cai,

Su,

Lee

et al. 2024

DTCO and Computational Patterning III

View full text Add to dashboard Cite

In modern digital integrated-circuit designs, standard-cell libraries are critical foundations. Transistor sizing can help determine an optimal set of transistor sizes of the standard-cell circuit under specified design constraints and desired circuit optimization goals. The conventional equation-based approaches can cause significant electric characteristic deviation, and the simulation-based approaches may be severely restricted by initial values. Recently, we proposed an improved transistor sizing method to compensate for the drawbacks. However, it did not consider the layout-dependent lithography effects. The printed wafer patterns can suffer from significant geometric distortions when layout geometry shrinks. It is worth investigating the lithography effects to ensure that the electrical characteristics of the manufactured devices can still meet the target design specifications. This work extends the effectiveness verification of the improved transistor sizing method by further considering the lithography effects. An in-house lithography simulation tool is utilized to generate wafer patterns. The electrical characteristics of transistors with non-rectangular gate shapes due to the lithography distortion are analyzed through different equivalent-gate-length estimation methods. The impacts of lithography effects on the optimized transistor sizes are characterized in several design cases.

show abstract

Section: Impacts Of Narrow Width Effects On Electronic Characteristicsmentioning

confidence: 99%

A transistor sizing method for standard-cell optimization considering lithography effects

Cai,

Su,

Lee

et al. 2024

DTCO and Computational Patterning III

View full text Add to dashboard Cite

show abstract

“…Different threshold voltages are achieved by the reverse narrow width effect (RNWE) and reverse short channel effect (ISCE) [21,22,23], as depicted in Fig. 3(b).…”

Section: Temperature-to-frequency Conversionmentioning

confidence: 99%

An all-digital CMOS temperature sensor with a wide supply voltage range

Qian

Li²,

Zhang

et al. 2022

IEICE Electron. Express

View full text Add to dashboard Cite

This paper proposes a MOSFET-based all-digital temperature sensor fabricated in a standard 55-nm CMOS process. The temperature sensing elements of the sensor are composed of ring oscillators, which convert temperature information into frequency information. The frequency ratio's proportional to absolute temperature (PTAT) feature is generated by using two separate frequency oscillators with varied temperature sensitivity. The frequency-to-digital converter (FDC) converts frequency information into digital representation without introducing any overhead reference clock. A die area of 1915 µm 2 is occupied, owing to the all-digital architecture. After two-point calibration, the proposed sensor achieves an error of −0.4 • C∼+0.6 • C throughout a temperature range of −40 • C∼125 • C. With the help of class-adjustable oscillators, the sensor can function in a wide supply voltage range from 0.5 V to 1.2 V. It obtains a resolution of 0.166 • C at room temperature with a dissipation of 2.5 µW.

show abstract

“…Based on three-dimensional device simulation, it has been shown that the potential at the channel edges are enhanced by fringing gate fields terminating on the sidewall of the channel. This effect is included in C g by introducing a fringing factor F [12], defined as…”

Section: (B)mentioning

confidence: 99%

An analytical model for current-voltage characteristics of a small-geometry poly-Si thin-film transistor

Chopra¹,

Gupta²

2000

Semicond. Sci. Technol.

View full text Add to dashboard Cite

An analytical model of the above-threshold characteristics of a small-geometry poly-silicon thin film transistor considering the grain boundary effect on the turn-on behaviour is proposed. Small geometry effects are also incorporated to develop an accurate expression for the threshold voltage and the current-voltage (I -V ) characteristics in the turn-on region. Further, the channel length dependent threshold voltage proposed shows good agreement with experimental data and the I -V characteristics with channel dimensions 2 and 0.5 µm are in excellent agreement with experimental results confirming the validity of this model.

show abstract

Characterization of the inverse-narrow-width effect

Cited by 36 publications

References 12 publications

A transistor sizing method for standard-cell optimization considering lithography effects

A transistor sizing method for standard-cell optimization considering lithography effects

An all-digital CMOS temperature sensor with a wide supply voltage range

An analytical model for current-voltage characteristics of a small-geometry poly-Si thin-film transistor

Contact Info

Product

Resources

About