An analytical model for current-voltage characteristics of a small-geometry poly-Si thin-film transistor

Chopra, Sonia; Gupta, R. S.

doi:10.1088/0268-1242/15/11/310

Cited by 8 publications

(4 citation statements)

References 20 publications

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“…The threshold voltage of control poly-Si TFT is decreased with the decreased channel length, which is called the threshold voltage roll-off effect dominated by the grain boundary trap states. 26,27 Nevertheless, in the case of the argonimplanted poly-Si TFT, its threshold-voltage roll-off effect could be well suppressed because it has fewer grain boundary trap states in poly-Si channel film. Therefore, the threshold voltage of the argonimplanted poly-Si TFT is slightly dependent on the channel length.…”

Section: J376mentioning

confidence: 99%

Enhanced Performance and Reliability for Solid-Phase Crystallized Poly-Si TFTs with Argon Ion Implantation

Chang

2007

J. Electrochem. Soc.

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High-performance solid-phase crystallized ͑SPC͒ polycrystalline silicon thin-film transistors ͑TFTs͒ with argon ion implantation ͑argon-implanted poly-Si TFTs͒ are proposed in this study. Compared to the control poly-Si TFT, the argon-implanted poly-Si TFT has superior electrical characteristics, including lower threshold voltage, higher field-effect mobility, steeper subthreshold swing, lower trap state density, etc. These electrical performance improvements could be attributed to the fine microstructure of the SPC poly-Si film improved by deep argon ion implantation beyond the interface of amorphous Si and underlying oxide. Therefore, a high-quality poly-Si channel accompanied with larger grain size and lower grain boundary trap states could be obtained. Moreover, the argon-implanted poly-Si TFT also exhibits an improved hot-carrier stress immunity owing to reduced weak Si-Si or Si-H bonds from fewer grain boundaries in the poly-Si channel.In recent years, polycrystalline silicon thin-film transistors ͑poly-Si TFT͒ have been widely used for active matrix liquid crystal displays ͑AMLCDs͒ on glass substrates. 1,2 However, a difficult technological challenge is to develop high-performance poly-Si TFTs that are useful for both pixel switching elements and peripheral driving circuits. 3 To achieve high-performance poly-Si TFTs on inexpensive glass substrate, low-temperature technology is required for realizing the flat-panel displays ͑FPDs͒ owing to the maximum process temperature of Ͻ600°C. The solid-phase crystallization ͑SPC͒ process is widely used for phase transformation from amorphous to polycrystalline due to its low fabrication cost and good grain-size uniformity. However, the electrical characteristics of SPC poly-Si TFTs are strongly dependent on the microstructure of poly-Si film. In particular, the trap states in the poly-Si grains and grain boundaries acted as scattering centers and midgap traps are known to degrade the carrier's transport properties and increase the off-state leakage current. 4-6 Consequently, reducing these trap states becomes the primary way for achieving high-performance poly-Si TFTs. Hydrogen plasma treatment is a widely used method to passivate the trap states of the poly-Si film and improve the electrical performances of devices in modern TFT manufacturing. 7,8 However, the hydrogenated poly-Si TFTs suffer from a serious reliability issue due to the easily broken of weak Si-H bonds at grain boundaries. Therefore, the SPC process plays an important role to affect the electrical characteristics of poly-Si TFTs. 9-11 However, the traditional SPC method is an interface-nucleation mechanism generating too many nucleation sites at the amorphous silicon/underlying oxide ͑␣-Si/SiO 2 ͒ interface, resulting in a small grain size and a large number of grain boundary trap states. 12-15 Thus, many efforts have been attempted to increase the grain size and to reduce the trap state density of poly-Si film. [16][17][18][19] Many surface-nucleation techniques during the SPC process were proposed ...

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Section: J376mentioning

confidence: 99%

Enhanced Performance and Reliability for Solid-Phase Crystallized Poly-Si TFTs with Argon Ion Implantation

Chang

2007

J. Electrochem. Soc.

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“…This shift is referred to as channel length modulation (CLM) and the device under this condition behaves as if the channel length L is shortened by L CLM and drain current becomes larger than its value at the onset of the saturation region. Thus drain current in the saturation region (without considering kink effect) is expressed by replacing L by L − L CLM and V ds by V d sat in (17) to get…”

Section: Drain Currentmentioning

confidence: 99%

“…The turn-on voltage on comparison of poly-Si devices with their crystalline counterparts is found to be much higher in value. Conventional models have adopted the scheme of enhanced doping density/potential barrier to predict the characteristics of poly-Si TFTs [13][14][15][16][17], but these do not give insight into device behaviour due to the effects of traps and grain boundaries.…”

Section: Introductionmentioning

confidence: 99%

Physics based threshold voltage extraction and simulation for poly-crystalline thin film transistors using a double-gate structure

Sehgal

Mangla

Chopra

et al. 2006

Semicond. Sci. Technol.

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In this work, a two-dimensional potential distribution formulation/model is presented for double-gate poly-crystalline silicon thin film transistors. The work aims at deriving a potential solution for the threshold voltage estimation of the device under consideration. The Green's function approach is adopted for the two-dimensional potential solution. The developed formulation incorporates the effects due to traps and grain boundaries. The existence of short-channel effects and drain-induced barrier-lowering effects can also be seen from the characteristics. A relation to achieve the targeted threshold voltage with the physical gate dielectric thickness, dielectric constant, substrate doping concentration, grain size and drain-source voltage as parameters is also presented. The model is then extended to evaluate drain current performance. The results obtained show an excellent agreement with numerical modelling based on the finite difference method and also a good agreement with simulation results, thus demonstrating the validity of our model.

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“…A successful design of circuits using poly-Si TFTs requires a proper understanding of its electrical properties. Several models (physics based, empirical and analytical) have been proposed to predict the characteristics of poly-Si TFTs [11][12][13][14][15][16][17][18][19][20][21] but these do not give insight into the device behavior due to the effects of traps and grain-boundaries. Thus, the need arises to formulate a model that gives insight into the effects of traps and grain-boundaries.…”

Section: Introductionmentioning

confidence: 99%

Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

Sehgal¹,

Mangla²,

Gupta³

et al. 2007

JSTS:Journal of Semiconductor Technology and Science

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A two-dimensional treatment of the potential distribution under the depletion approximation is presented for poly-crystalline silicon thin film transistors. Green's function approach is adopted to solve the two-dimensional Poisson's equation. The solution for the potential distribution is derived using Neumann's boundary condition at the silicon-silicon dioxide interface. The developed model gives insight into device behavior due to the effects of traps and grainboundaries. Also short-channel effects and drain induced barrier lowering effects are incorporated in the model. The potential distribution and electric field variation with various device parameters is shown. An analysis of threshold voltage is also presented. The results obtained show good agreement with simulated results and numerical modeling based on the finite difference method, thus demonstrating the validity of our model.

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An analytical model for current-voltage characteristics of a small-geometry poly-Si thin-film transistor

Cited by 8 publications

References 20 publications

Enhanced Performance and Reliability for Solid-Phase Crystallized Poly-Si TFTs with Argon Ion Implantation

Enhanced Performance and Reliability for Solid-Phase Crystallized Poly-Si TFTs with Argon Ion Implantation

Physics based threshold voltage extraction and simulation for poly-crystalline thin film transistors using a double-gate structure

Poly-crystalline Silicon Thin Film Transistor: a Two-dimensional Threshold Voltage Analysis using Green's Function Approach

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