Characterization of scaled SONOS EEPROM memory devices for space and military systems

White, M.H.; Adams, Dennis M.; Murray, James R.; Wrazien, Stephen J.; Zhao, Yijie; Wang, Yu; Khan, Bilal; Miller, William K.; Mehrotra, Rajat

doi:10.1109/nvmt.2004.1380804

Cited by 19 publications

(6 citation statements)

References 22 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In the rad-hard market this type of technology has been very successful: rad-hard EPROM and memories have been in production for many years [116]- [118]. In the mainstream market, as we saw, the floating gate architecture is the undisputed leader, even though there are successful commercial products based on the NROM architecture.…”

Section: B Charge Trap Memoriesmentioning

confidence: 99%

Present and Future Non-Volatile Memories for Space

Gerardin

Paccagnella

2010

IEEE Trans. Nucl. Sci.

138

View full text Add to dashboard Cite

We discuss non-volatile memories (NVM) for space applications. The focus will be both on technologies and devices aimed at the mainstream commercial markets and on rad-hard devices. Commercial NVMs are very attractive for space designers due to their large size (tens of Gbits), even though they have several issues related to ionizing radiation. Rad-hard NVMs offer radiation hardness, but are available only in small size (few Mbits). Most of the emphasis in this review paper will be on the current dominant technology in the mainstream market: floating gate flash memories. A comprehensive discussion of total dose and single event effects results for a wide cross section of NVMs will be presented. Finally, we will conclude with a cursory glance at other emerging non-volatile technologies.Index Terms-Ferroelectric devices, flash memory, magnetoresistive devices, nonvolatile memory, phase change memory, radiation effects. I. OVERVIEWN ON-VOLATILE memories (NVMs) are used in a variety of space applications, as data or code memories, and are increasingly needed for future missions. This paper will discuss the technologies and devices available for non-volatile storage in the mainstream and in the rad-hard market, with a strong attention to the radiation sensitivity, which is of primary importance for harsh environments such as space.The work is organized as follows: we will first introduce the basic definitions and metrics concerning NVMs, then explore and compare the major storage concepts. In particular, charge-based, phase-change, ferroelectric, and magnetoresistive memories will be presented, with emphasis on density, performance, reliability, and radiation sensitivity. Architectural information concerning the array organization and peripheral circuitry will be given, highlighting known radiation issues and critical building blocks. A. Key Definitions and MetricsA non-volatile memory is a memory that retains information when powered off. Different terms are used to indicate the act of storing a digital value in a non-volatile memory bit, depending on the memory type and architecture. In charge-based storage, the terms program and erase are used to indicate the injection of Manuscript negative charge into and its removal from (or injection of positive charge into) the charge storage element, respectively. In the context of phase change memories, the terms set and reset are used to indicate the operations leading to the crystallization and amorphization of the phase-change material. For other memories, such as ferroelectric or magnetic, the term write is simply used, as for SRAMs and DRAMs. The association of these operations and terms with the stored digital value ("0" or "1") is arbitrary. In the following we will stick to the conventions most commonly used for each memory type.In addition to familiar parameters such as speed, power consumption, and density, two additional metrics are of main importance for non-volatile memories: retention and endurance. This is because wear-out is usually much stronger in non-volat...

show abstract

Section: B Charge Trap Memoriesmentioning

confidence: 99%

Present and Future Non-Volatile Memories for Space

Gerardin

Paccagnella

2010

IEEE Trans. Nucl. Sci.

138

View full text Add to dashboard Cite

show abstract

“…The T bo ranges from 1.8 to 5 nm. The measurement data for the T bo = 1.8 nm device are quoted from [5] 0018-9383/$25.00 © 2007 IEEE and other oxide thickness results are measured in this paper. FN tunneling is employed for programming and erase.…”

Section: Retention-loss Simulation Modelmentioning

confidence: 99%

“…The nitride storage cells have evolved into two types: The first one has uniform charge storage in a nitride layer, such as conventional SONOS, and the second one utilizes localized charge storage at the source/drain junctions, such as NROM [1] or Nbit technology [4]. Since the conven- Its data retention, thus, imposes an intrinsic reliability constraint due to significant direct-tunneling current through an ultrathin bottom oxide [5]- [8].…”

mentioning

confidence: 99%

Numerical Simulation of Bottom Oxide Thickness Effect on Charge Retention in SONOS Flash Memory Cells

Hsu

Wang

et al. 2007

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

In this paper, bottom-oxide thickness (T bo ) and program/erase stress effects on charge retention in SONOS Flash memory cells with FN programming are investigated. Utilizing a numerical analysis based on a multiple electron-trapping model to solve the Shockley-Read-Hall rate equations in nitride, we simulate the electron-retention behavior in a SONOS cell with T bo from 1.8 to 5.0 nm. In our model, the nitride traps have a continuous energy distribution. A series of Frenkel-Poole (FP) excitation of trapped electrons to the conduction band and electron recapture into nitride traps feature the transitions between the conduction band and trap states. Conduction band electron tunneling via oxide traps created by high-voltage stress and trapped electron direct tunneling through the bottom oxide are included to describe various charge leakage paths. We measure the nitride-charge leakage current directly in a large-area device for comparison. This paper reveals that the charge-retention loss in a high-voltage stressed cell, with a thicker bottom oxide (5 nm), exhibits two stages. The charge-leakage current is limited by oxide trap-assisted tunneling in the first stage and, then, follows a 1/t time dependence due to the FP emission in the second stage. The transition time from the first stage to the second stage is related to oxide trap-assisted tunneling time but is prolonged by a factor. Index Terms-Oxide thickness, positive oxide charge-assisted tunneling, Shockley-Read-Hall (SRH) rate equation, SONOS retention mechanisms.

show abstract

“…Compared to conventional FG memory cells, charge trapping memory cells with silicon-oxide--nitrideoxide-silicon (SONOS) technology provide better radiation immunity, because the electrons and holes are stored in discrete traps in the nitride layer. These devices were reported to have radiation tolerances of up to 1 Mrad(Si) [7,8]. Although SONOS devices are more radiation-tolerant than FG memories, only limited work has been published on their radiation tolerance to date, because they suffer from other limitations, such as low memory density and their need for balance between memory retention and erase speed [9][10][11].…”

Section: Introductionmentioning

confidence: 99%

Total ionizing radiation effects of 2-T SONOS for 130 nm/4 Mb NOR flash memory technology

Qiao

Pan

Xiao

et al. 2014

Sci. China Inf. Sci.

View full text Add to dashboard Cite

In this paper, we have studied the total ionizing dose (TID) radiation response up to 2 Mrad(Si) of silicon-oxide-nitride-oxide-silicon (SONOS) memory cells and memory circuits, fabricated in a 130 nm complimentary metal-oxide-semiconductor (CMOS) SONOS technology. We explored the threshold voltage (V T) degradation mechanism and found that the V T shifts of SONOS cells depend on the charge state; simply programming the cell to a higher V T cannot compensate for the radiation induced V T loss. The off-state current (I off) increase in the SONOS cell is also studied in this paper. Both V T and I off degradation would affect the memory system. Read data failures are mainly caused by V T shifts under irradiation, and program and erase failures are mainly caused by increased I off , which overloads the charge pumping circuit. By varying the reference current, our 4 Mb NOR flash chip has the potential to survive a radiation dose of 1 Mrad(Si) in read mode.

show abstract

Characterization of scaled SONOS EEPROM memory devices for space and military systems

Cited by 19 publications

References 22 publications

Present and Future Non-Volatile Memories for Space

Present and Future Non-Volatile Memories for Space

Numerical Simulation of Bottom Oxide Thickness Effect on Charge Retention in SONOS Flash Memory Cells

Total ionizing radiation effects of 2-T SONOS for 130 nm/4 Mb NOR flash memory technology

Contact Info

Product

Resources

About