Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729)
DOI: 10.1109/iitc.2004.1345761
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Characterization of patterned low-k film delamination during CMP for the 32nm node Cu/ultra low-k (k=1.6-1.8) integration

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Cited by 4 publications
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“…It is reported that introduction of these porous low-k films in LSI fabrication brings difficulties and complexities due to their porous structure. [1][2][3][4][5][6][7][8][9][10][11][12] For example, delamination is reported to occur when copper on porous low-k dielectric is polished by chemical mechanical polishing ͑CMP͒. [6][7][8][9][10] Moreover, increase of dielectric constant is found when porous low-k dielectric is patterned by a dry etching process.…”
mentioning
confidence: 99%
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“…It is reported that introduction of these porous low-k films in LSI fabrication brings difficulties and complexities due to their porous structure. [1][2][3][4][5][6][7][8][9][10][11][12] For example, delamination is reported to occur when copper on porous low-k dielectric is polished by chemical mechanical polishing ͑CMP͒. [6][7][8][9][10] Moreover, increase of dielectric constant is found when porous low-k dielectric is patterned by a dry etching process.…”
mentioning
confidence: 99%
“…[1][2][3][4][5][6][7][8][9][10][11][12] For example, delamination is reported to occur when copper on porous low-k dielectric is polished by chemical mechanical polishing ͑CMP͒. [6][7][8][9][10] Moreover, increase of dielectric constant is found when porous low-k dielectric is patterned by a dry etching process. 11,12 Alternative nonporous polymer fluorocarbon is considered an indispensable ultralow-k dielectric to avoid such complexity for LSI fabrication.…”
mentioning
confidence: 99%
“…Major problems are delamination caused by chemical mechanical planarization and drastic change in the dielectric due to pore-induced damage occurring in the wet cleaning and ashing processes. Since porous SiOCH occupies a lot of space in a film, it is fragile and readily absorbs any solutions or gases [1][2][3][4][5]. Moreover, Cu atoms easily diffuse into the SiOCH through pores.…”
Section: Introductionmentioning
confidence: 99%
“…To meet the demands for high-speed operation and low-power consumption in ultralarge scale integrated circuits, ultralow-k (ULK) dielectric is increasingly required in Cu interconnects. 1 Degradation of the electrical and mechanical properties of the low-k dielectric film needs to be avoided for ULK dielectric integration during Cu damascene fabrication. [2][3][4] The chemical mechanical planarization (CMP) technique has been emerging as an indispensable processing technique to level out topographical steps created on an interconnect structure.…”
mentioning
confidence: 99%
“…14 In particular, ULK film with pores is reported to be so fragile that it is becoming difficult in post-CMP cleaning to achieve a great enough particle removal ability without generating defects or degradation of electrical properties. 1,3,4 The authors have reported effects of various cleaning solutions on the shear force of post Cu CMP cleaning. 12 In that report, These reveal that the contact of the brush with the wafer and fluid flow both play an important role in the shear force, and tribological and hydrodynamic studies are considered to be necessary to clarify the mechanism of shear force generation.…”
mentioning
confidence: 99%