Characterization of Interface State Density from Subthreshold Slope of MOSFETs at Low Temperatures (≥ 10 K)

Abstract

We have evaluated interface state density (DIT) for EC−ET > 0.00 eV from the subthreshold slope deterioration of MOSFETs at low temperatures. We have compared two n-channel MOSFETs on the C- and a-faces with the gate oxide formed by pyrogenic oxidation followed by annealing in H2. The peak field-effect mobility (µFE,peak) for the C-face MOSFET was 57 cm2V-1s-1 at 300 K, which is lower than the half of 135 cm2V-1s-1 for the a-face MOSFET. We have shown that DIT very close to EC can well explain why µFE for C-face MOSFETs is lower than that for a-face MOSFETs. The value of DIT at 0.00 eV corresponding to the subthreshold slope at 11 K was 1.6×1014 cm-2eV-1 for the C-face MOSFET, which is more than the double of 6.4×1013 cm-2eV-1 for the a-face MOSFET.

N-channel field-effect mobility inversely proportional to the interface state density at the conduction band edges of SiO2/4H-SiC interfaces

“…However, as indicated by the spread of the two lines, the correlation between µ FE,peak (300 K) and the interface state density became weaker in the order of D IT,∆I (0.00 eV), N T,∆I , and D IT,∆I (0.18 eV). The correlation with D IT,∆I (0.18 eV) is consistent with the correlation with D IT (C − ψ S , 0.2 eV), 12 and µ FE,peak (300 K) for the a-face MOSFETs were higher than those on the other faces at the equivalent D IT,∆I (0.18 eV), which indicates that D IT at about 0.2 eV is insufficient as the factor that deteriorates µ FE for the Si-and C-face MOSFETs when compared with that for the a-face MOSFETs. Therefore, we conclude that D IT near E C is the most critical factor for µ FE,peak (300 K) and that µ FE for the Si-and C-face MOSFETs is lower than that for the a-face MOSFETs because of D IT at the energy very near to the conduction band edge.…”

“…In contrast, we showed that D IT , when evaluated on the basis of the subthreshold slope (S) of a MOSFET, is consistent with D IT evaluated by the C−ψ S method, 12 which indicates that the subthreshold slope deterioration of 4H-SiC MOSFETs is caused by the interface states. 9,[14][15][16] Because the Fermi energy (E F ) at the interface that corresponds to the subthreshold region approaches E C with decreasing temperature, D IT at energies nearer E C can be evaluated from the subthreshold slope at lower temperatures.…”

“…6(b)). 3,4,6,7,[10][11][12][13]16 The evaluated N T was in the range of 10 12 -10 13 cm −2 , which is extremely low when compared with the surface atomic density on SiC (more than 1 × 10 15 cm −2 ). Then, it has been found that very small part of the interface atoms form interface states.…”

“…[1][2][3][4][5][6][7][8][9][10] Although the interface states have been assumed to be a main cause of the low channel current, 2,3,6,7,10,16 a clear correlation between the interface state density (D IT ) and the channel performance has not been determined. 11 We recently showed that the peak n-channel field-effect mobility (µ FE,peak ) at room temperature is roughly inversely proportional to D IT for samples on the (0001), (000-1), and (11)(12)(13)(14)(15)(16)(17)(18)(19)(20) faces (the Si-, C-, and a-faces, respectively) after dry/nitridation and pyrogenic/hydrotreatment processes, 12 where D IT was evaluated by the C−ψ S method 13 at 0.2 eV below the conduction band edge (E C −E T = 0.2 eV) using MOS capacitors. However, µ FE,peak for a-face MOSFETs is higher than those for the Si-and C-face MOSFETs at the same D IT .…”

Electrical characterization of amorphous Al2O3 dielectric films on n-type 4H-SiC

“…A key problem is the high density of so called near-interface traps (NITs) detected at the SiO 2 /4H-SiC interface with energy levels near the SiC conduction band edge that limit the electron channel mobility. [3][4][5][6] Currently thermal oxides grown or annealed in NO or N 2 O are the mainstream dielectrics but more reduction in NITs is needed. 7 Other large bandgap dielectrics such as AlN, Al 2 O 3 and HfO 2 have also been investigated.…”