Characterization of Cdv/dt induced power loss in synchronous buck DC-DC converters

Abstract

-Good understanding of power loss in a high frequency synchronous buck converter is important for design optimization of both power MOSFET and circuit itself. Most of the MOSFET power losses are relatively easy to quantify. The exception is the power loss associated with Cdv/dt induced turn on of the low-side MOSFET (synchronous rectifier). This paper characterizes the Cdv/dt induced power loss in two ways. First, detailed device characterization, in-circuit testing, and modeling are used for a comparative loss calculation. This method requires specialized test equipment and is rather complicated and time consuming. A simple method is then introduced to very accurately quantify the Cdv/dt loss. With this method, the impacts of the Cdv/dt power loss on synchronous buck converters at different operation conditions can be readily assessed. The impacts of Cdv/dt induced turn on different applications are addressed.

Analytical models of the crosstalk voltage in SiC MOSFETs under different loads

“…Comparing the analytical and experimental results in Figure 9, the change tendency of V Rmax , V Lmax and V Lmin with R gext2 are all consistent. It can be seen from the experimental results that V Rmax increases 1.95 V, V Lmax increases 4.2 V, and V Lmin FIGURE 9 The crosstalk voltage spikes under different R gext2 .…”

“…According to (9), v gs2 and v ds2 are decoupled. Combining the saturation region current equation, the expression of v gs1 , and ( 6), ( 7), ( 8), (9), v ds2 is:…”

“…In recent years, many scholars have done a lot of research on the modelling of crosstalk voltage and the analysis of its influencing factors. In terms of modelling, [9] pointed out that crosstalk is a dynamic process, and the characteristics of device capacitance and body-diode need to be considered. In [10], an analytical model of crosstalk voltage considering various parasitic parameters was proposed.…”

A study on EMI noise source modeling with voltage source in synchronous DC-DC buck converter

“…13. The forward voltage V f of body diode appears just before rising of V SW [12]. It is difficult to consider effect of body diode characteristics because equivalent circuit model in this study is expressed as liner time-invariant RLC circuit.…”

“…The rise time of voltage source (t r ) affects surge voltage (V surge ). The voltage of capacitor in the RLC series circuit V C (t) is equal to the third term of ( 8) and can be written in (12), which almost corresponds with V SW .…”