Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

Vogt, M.; Krüger, H.; Hemperek, T.; Janssen, J.; Pohl, David Leon; Daas, M.

doi:10.22323/1.313.0084

Cited by 7 publications

(7 citation statements)

References 2 publications

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“…The test setup is based on the BDAQ53 data acquisition system [8]. The input command can be provided by BDAQ53 directly or by an external signal generator.…”

Section: Measurement Resultsmentioning

confidence: 99%

A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology

Μουστάκας¹,

Rymaszewski²,

Hemperek³

et al. 2020

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2019)

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“…The test setup is based on the BDAQ53 data acquisition system [8]. The input command can be provided by BDAQ53 directly or by an external signal generator.…”

Section: Measurement Resultsmentioning

confidence: 99%

A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology

Μουστάκας¹,

Rymaszewski²,

Hemperek³

et al. 2020

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2019)

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“…The chip was tested using the BDAQ53 data acquisition system [6]. Figure 4 shows the measurement setup, including a custom PCB carrying the RD53A chip connected to a data acquisition board built upon a commercially available FPGA module.…”

Section: Measurement Resultsmentioning

confidence: 99%

A high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip

Wang¹,

Hemperek²,

Krüger³

et al. 2019

Proceedings of Topical Workshop on Electronics for Particle Physics — PoS(TWEPP2018)

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In order to satisfy the high output bandwidth requirement imposed by the High Luminosity LHC, a high speed transmitter circuit was designed and integrated into the RD53A demonstrator chip for the phase 2 ATLAS/CMS pixel detector upgrade. A clock and data recovery circuit recovers clock from the 160 Mb/s data stream received by the chip, and provides the high speed clock to the serializer, where the 1.28 Gb/s output stream is formed from the 20-bit data words provided by the data encoding logic. The output stage employs a three-tap current-mode logic cable driver with adjustable tap weights for optimal pre-emphasis in order to compensate for the high frequency loss of the foreseen low mass cable. Each RD53A chip includes four output data lines, offering in total 5.12 Gb/s output bandwidth. The RD53A chip has been fabricated in a 65 nm CMOS technology. The output jitter was measured to be ∼ 20 ps (1 σ ) with pseudo random data at the nominal speed of 1.28 Gb/s.

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“…Two prototypes of readout ASICs, FE65-P2 and RD53A [51], have been characterised in test beams and for the current stage of testing, the RD53A is used. In order to operate the new generation of readout chips also new readout systems YARR [52,53] and BDAQ53 [54] have been developed. They profited from experience with the previous DAQ generations and both are providing an EUDAQ Producer.…”

Section: Atlas Inner Tracker: Pixel Detector Randdmentioning

confidence: 99%

EUDAQ—a data acquisition software framework for common beam telescopes

et al. 2020

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The development of EUDAQ started as part of the EU-funded Joint Research Activity of the EUDET project "Test Beam Infrastructure" [3,4] in 2005. The goal of the project was the development of a high-precision pixel beam telescope for investigations of the tracking performance of sensor devices. To make this beam telescope a versatile tool for a broad user base and a wide variety of devices, an easy integration strategy for devices under test (DUT) and its DAQ was a priority from the beginning of the project [5]. The interface that was considered to be the most flexible for the user consisted of two separate layers: on the hardware level, the different DAQ systems were to be synchronised using a simple trigger-busy communication protocol; on the software level, the full integration of the DUT into EUDAQ was foreseen as the preferred approach, yet was kept optional.This approach determined the core architecture of EUDAQ [6] which remains today: centralised but distributed core components that communicate with so-called Producers via a custom TCP/IPbased protocol. In this scheme, the latter are responsible for implementing an interface to the individual hardware components, controlling the devices' states and feeding the data into the central data collection unit. Both the beam telescope detector planes and the DUT use the same interface, thus making the framework flexible and independent of any specific hardware. The framework architecture is described in more detail in Section 2.Historically, the most prominent application of EUDAQ is the DAQ of the EUDET-type pixel beam telescopes [7]. They are based on Mimosa26 sensors [8] as telescope planes and a custom-designed trigger logic unit (TLU), the EUDET TLU [9]. Today, the EUDET-type beam telescopes are accessible as common infrastructure at test beam facilities all over the world. This broad availability of beam telescopes combined with the ease-of-use, extensive documentation and user-focus of EUDAQ outlined in Section 3 has led to a large number of successful EUDAQ-based test beam campaigns in the last decade: in Section 4, eleven applications from a wide range of communities are described in more detail.Since the early days of mostly user-driven development, EUDAQ has been moved to a collaborative development model with several active contributors. New features as well as many behind-the-scenes changes such as continuous integration methods paved the road towards the second major version of EUDAQ as briefly outlined in Section 5.

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Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS

Cited by 7 publications

References 2 publications

A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology

A Clock and Data Recovery Circuit for the ALTAS/CMS HL-LHC Pixel Front End Chip in 65 nm CMOS Technology

A high speed transmitter circuit for the ATLAS/CMS HL-LHC pixel readout chip

EUDAQ—a data acquisition software framework for common beam telescopes

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