Characterization and prediction of the avalanche performance of 1.2 kV SiC MOSFETs

DiMarino, Christina; Hull, Brett

doi:10.1109/wipda.2015.7369294

Cited by 24 publications

(16 citation statements)

References 4 publications

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“…4 and it clearly indicates that the critical EAV decreases for higher TCASE. Several previous studies have presented the relationship between different I0 and tAV values for UIS test on SiC power MOSFETs with an aim to determine the critical EAV as well as the SOA boundary conditions [10,11].…”

Section: Resultsmentioning

confidence: 99%

UIS failure mechanism of SiC power MOSFETs

Fayyaz

Castellazzi

Romano

et al. 2016

2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)

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Abstract-This paper investigates the failure mechanism of SiC power MOSFETs during avalanche breakdown under unclamped inductive switching (UIS) test regime. Switches deployed within motor drive applications could experience undesired avalanche breakdown events. Therefore, avalanche ruggedness is an important feature of power devices enabling snubber-less converter design and is also a desired feature in certain applications such as automotive. It is essential to thoroughly characterize SiC power MOSFETs for better understanding of their robustness and more importantly of their corresponding underling physical mechanisms responsible for failure in order to inform device design and technology evolution. Experimental results during UIS at failure and 2D TCAD simulation results are presented in this study.

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Section: Resultsmentioning

confidence: 99%

UIS failure mechanism of SiC power MOSFETs

Fayyaz

Castellazzi

Romano

et al. 2016

2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)

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“…These appear at different points of a typical SC waveform (see Figure 1(b)): (A) thermal failure due to high dissipated losses; (B) overvoltage during turn-off; and finally (C) thermal runaway due to high leakage current (see Figure 1(b)). Regarding failure B, if the overvoltage at turn-off exceeds the breakdown voltage, the device eventually goes into avalanche; this results in a combination of high dissipated power loss and high electric field [10]. In this article, all short-circuit tests have been conducted in a way, so that the device stays within its safe-operating area.…”

Section: Short-circuit Behaviour Of Sic Mosfetsmentioning

confidence: 99%

A Structural Based Thermal Model Description for Vertical SiC Power MOSFETs under Fault Conditions

Maerz

Bertelshofer

Bakran

2016

Active and Passive Electronic Components

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The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application.

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“…The reliability and robustness of SiC devices is also increasingly under scrutiny. SiC MOSFETs are well known for good avalanche performance in comparison with silicon MOSFETs and IGBTs [2][3][4][5][6][7][8][9][10]. This is due to the wide bandgap and high critical electric field characteristics of SiC which means more energy is required to generate electron-hole pairs through impact ionization [9].…”

Section: Introduction To Sic Cascodementioning

confidence: 99%