Characteristics of Surface-Channel Strained Si_1-yC_yn-MOSFETS

Abstract

The first demonstration of n-MOSFETs fabricated using strained Si1-yCy surface channels is reported. Tensile-strained Si1-yCy layers with substitutional carbon contents up to 0.8 atomic percent were epitaxially grown on <100> Si substrates by rapid thermal chemical vapor deposition, using silane and methylsilane as the silicon and carbon precursors. n-MOSFETS were fabricated using standard MOS processing with reduced thermal exposure to minimize the possibility of strain relaxation. A remote plasma CVD oxide was employed to form the gate oxide. The Si1-yCy devices exhibit electrical characteristics that are typical for Si n-MOSFETs, with good turn-on and subthreshold characteristics. MOS capacitance-voltage analysis demonstrates comparable oxide interface qualities for the Si1-yCy and Si control devices. No carbon-related leakage current is observed in source and drain diode junctions. Characterization of the MOSFET electron inversion layer mobility at room temperature shows comparable mobilities, within the sensitivity of the measurement, for the Si1-yCy and Si control devices. This is in contrast to the mobility enhancement observed in n-MOSFETs fabricated using tensile- strained Si grown on relaxed Si1-xGex layers. At low temperatures, the inversion layer mobility of Si1-yCy devices is lower than that of the Si controls, and appears to be affected by Coulomb and possibly random alloy scattering.

On the scaling issues and high-κ replacement of ultrathin gate dielectrics for nanoscale MOS transistors

“…Looking for higher mobility materials is also a recent hot research topic [32][33][34]. Although mobilities of materials other than conventional Si, such as SiGe and strained Si, are quite attractive, the achievable channel mobility is still far below the universe curve of channel mobility for Si.…”

Studying the impact of carbon on device performance for strained-Si MOSFETs

“…Fig. 7 compares the experimental mobility enhancement factor of strained Si 1−x C x n-MOSFETs on a Si substrate with a carbon content of 0.3% [20] and 0.4% [21]. The measured data for strained-Si 0.9975 C 0.0025 and Si 0.9954 C 0.0046 on Si 0.8 Ge 0.2 substrates are also shown.…”

“…Another advantage for future CMOS technology is the retardation of species outdiffusion from the source/drain into the strained-Si:C channel to improve short channel effect. However, recent results have indicated that Si 1−x C x has lower mobility [5] and reduces performance in a surface channel NMOSFET on relaxed Si buffers [5]. The goal of this work is to study the impact of carbon on device performance for strained-Si MOSFETs.…”

Theoretical study of electron mobility for silicon–carbon alloys

“…The quantitative enhancement factor is strongly correlated to the assumed alloy scattering potential for the calculations [2,3]. The Stanford group [4] has fabricated and demonstrated the operation of the surface channel of strained Si 1Àx C x NMOSFET, characterizing the electron inversion mobility both at room temperature and low temperature. However, it appears that the expected strain-induced phonon-limited mobility enhancement has been compensated for by the random alloy scattering and Coulomb scattering associated with non-substitutional carbon atoms [4].…”

“…The Stanford group [4] has fabricated and demonstrated the operation of the surface channel of strained Si 1Àx C x NMOSFET, characterizing the electron inversion mobility both at room temperature and low temperature. However, it appears that the expected strain-induced phonon-limited mobility enhancement has been compensated for by the random alloy scattering and Coulomb scattering associated with non-substitutional carbon atoms [4]. Recently, the UT group demonstrated the buried channel strained Si 1Àx C x PMOSFET for the first time.…”