Characteristics of N-Type Planar Junctionless Poly-Si Thin-Film Transistors

Abstract

In this work, we study the electrical characteristics of planar poly-Si junctionless (JL) thin-film transistors (TFTs) with 10 nm-thick channel and various gate width. The output current of JL devices is drastically larger than that of the control device with an undoped channel, owing to the abundant carriers contained in the channel of the JL devices which tends to reduce both channel and source/drain series resistances. Subthreshold swing of the JL devices is found to be larger than the control ones, owing to the existence of a depletion layer in the channel. Nonetheless, excellent on/off current ratio (>1E+07) is achieved, thanks to the use of the ultra-thin channel.

A novel uniformly doped barrier modulated ultra-deep-submicron poly-Si thin film transistor with very low subthreshold slope

“…Figure 1(a) shows conventional Poly-Si TFT while 1(b), 1(c), 1(d) represent uniformly n + doped film with staggered poly-Si BM-TFT, coplanar poly-Si BM-TFT and top contact poly-Si BM-TFT respectively. Recently, there have been many successful attempts to fabricate junctionless poly-Si TFTs [21][22][23][24]. n + and p + poly gates have been used to provide appropriate work function for creation of n + -i-p + regions in OFF state.…”