2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320)
DOI: 10.1109/relphy.2002.996607
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Cause of data retention loss in a nitride-based localized trapping storage flash memory cell

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Cited by 35 publications
(19 citation statements)
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“…33 The results showed good improvements in charge storage capacity due to the increase in particle density. 42,43 The latter are vulnerable to heavy charge leakage through the tunnel oxide that almost leaves the floating gate empty. In an attempt to address the screening effect, particle density multiplication performed by increasing the density of the BCP templates as an alternative to building layer-by-layer assemblies not only allowed increasing the particle density laterally, but also prevented the undesirable addition to the height of the device structure.…”
Section: C Capacitance-voltage (C-v) and Capacitance-time (C-t) Chmentioning
confidence: 99%
“…33 The results showed good improvements in charge storage capacity due to the increase in particle density. 42,43 The latter are vulnerable to heavy charge leakage through the tunnel oxide that almost leaves the floating gate empty. In an attempt to address the screening effect, particle density multiplication performed by increasing the density of the BCP templates as an alternative to building layer-by-layer assemblies not only allowed increasing the particle density laterally, but also prevented the undesirable addition to the height of the device structure.…”
Section: C Capacitance-voltage (C-v) and Capacitance-time (C-t) Chmentioning
confidence: 99%
“…The threshold-voltage shift can be due to the lateral motion of charge and electron-hole recombination inside the nitride [6] or due to the vertical loss through the bottom oxide [7], [8]. Recently, a new model was proposed, explaining the threshold-voltage loss by the annealing of the interface traps during retention [9].…”
Section: Endurance and Retentionmentioning
confidence: 99%
“…Identifying spatial/energetic trap distribution in the charge trapping, tunneling, and/or blocking dielectric layer is key to understand the non-volatile memory device reliability performance such as retention, endurance, and disturb [2][3][4]. The number of electrons stored (or trapped) in a memory device decreases dramatically with scaling-down, and only a few hundreds of electrons are trapped in a device below the 32 nm node [5,6].…”
Section: Introductionmentioning
confidence: 99%