CAT platform for analogue and mixed-signal test evaluation and optimization

Bounceur, Ahcène; Mir, Salvador; Rolindez, L.; Simeu, Emmanuel

doi:10.1109/vlsisoc.2006.313254

Cited by 22 publications

(6 citation statements)

References 11 publications

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“…. , 6 are computed using the fault simulator developed in [21,22]. Note, that the simulation results obtained in [21] indicate that test measures T 2 , T 4 and T 6 do not detect any fault.…”

Section: Case-studymentioning

confidence: 99%

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Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods

Bentobache

Bounceur

Euler

et al. 2015

IFIP Advances in Information and Communication Technology

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International audienceThis work presents new approaches to minimize the number of test frequencies for linear analog circuits. The cases of single and multiple fault detection regions for multiple test measures are considered. We first address the case when the injected faults have a single detection region in the frequency band. We show that the problem can be formulated as a set covering problem with a matrix having the consecutive-ones property for which the network simplex algorithm turns out to be very efficient. A second approach consists in modeling the problem by means of an interval graph, leading to its solution with a specific polynomial-time algorithm. A case-study of a biquadratic filter is presented for illustration purposes. Numerical simulations demonstrate that the two different approaches solve the optimization problem very fast. Finally, the optimization problems arising from multiple detection regions are modeled and solution approaches are discussed

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Section: Case-studymentioning

confidence: 99%

“…Without solving the SCP problem (22), it is clear that a minimal-cardinality set of test measures which detects all the faults is S = {T 1 , T When we sort in increasing order the bounds of the different detection regions, we find the following vector of frequencies: …”

Section: Case-studymentioning

confidence: 99%

Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods

Bentobache

Bounceur

Euler

et al. 2015

IFIP Advances in Information and Communication Technology

Self Cite

View full text Add to dashboard Cite

show abstract

“…For digital circuits, structural testing has provided costefficient solutions that lead to high defects coverage, without functional test [5]. However, AMS testing significantly differs from digital testing.…”

Section: Fault List Compression Techniquementioning

confidence: 99%

“…In [5] a Computer-Aided-Test platform was developed to evaluate the test techniques for analogue and mixed-signal circuits. It is useful to compare and improve different test techniques, by calculating analogue test metrics under process deviations.…”

Section: Introductionmentioning

confidence: 99%

Fault list compression for efficient analogue and mixed-signal production test preparation

Guerreiro

Santos

Teixeira

2014

Design of Circuits and Integrated Systems

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Accurate test effectiveness estimation for analogue and mixed-signal Systems on Chip (SoCs) is currently prohibitive in the design environment. One of the factors that sky rockets fault simulation costs is the number of structural faults which need to be simulated at circuit-level. In this paper we present a novel fault list compression technique that defines a stratified fault list, build with a set of representative faults (RFs), one per stratum. Criteria to partition the fault list in strata, and to identify RFs are presented and discussed. A fault representativeness metric is utilized, which is based on an error probability. The proposed methodology allows a tradeoff between fault list compression and fault representation accuracy that may be optimized for each test preparation phase. The methodology is independent of the chosen fault models and it is tested on cells with and without feedback. Fault representativeness evaluation is presented by applying the methodology to an industrial DC-DC converter. The proposed technique is a significant contribution to make mixed-signal fault simulation cost-effective as part of the production test preparation.

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“…In [8] a Computer-Aided-Test platform was developed to evaluate the test techniques for analogue and mixedsignal circuits. However, its operation is based on a statistical circuit performance analysis that accounts for process deviations.…”

Section: Introductionmentioning

confidence: 99%

Analogue and Mixed-Signal Production Test Speed-Up by Means of Fault List Compression

Guerreiro¹,

Santos²,

Teixeira³

2013

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Accurate test effectiveness estimation for analogue and mixed-signal Systems on a Chip (SoCs) is currently prohibitive in the design environment. One of the factors that sky rockets fault simulation costs is the number of structural faults which need to be simulated at circuit-level. The purpose of this paper is to propose a novel fault list compression technique by defining a stratified fault list, build with a set of “representative” faults, one per stratum. Criteria to partition the fault list in strata, and to identify representative faults are presented and discussed. A fault representativeness metric is proposed, based on an error probability. The proposed methodology allows different tradeoffs between fault list compression and fault representation accuracy. These tradeoffs may be optimized for each test preparation phase. The fault representativeness vs. fault list compression tradeoff is evaluated with an industrial case study—a DC-DC (switched buck converter). Although the methodology is presented in this paper using a very simple fault model, it may be easily extended to be used with more elaborate fault models. The proposed technique is a significant contribution to make mixed-signal fault simulation cost-effective as part of the production test preparation.

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CAT platform for analogue and mixed-signal test evaluation and optimization

Cited by 22 publications

References 11 publications

Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods

Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods

Fault list compression for efficient analogue and mixed-signal production test preparation

Analogue and Mixed-Signal Production Test Speed-Up by Means of Fault List Compression

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