Calibration of offset via bulk for low-power HfO2 based 1T1R memristive crossbar read-out system

Mohan, Charanraj; Camuñas-Mesa, Luis A.; Vianello, E.; Periniolla, L.; Reita, C.; Rosa, José M. de la; Serrano-Gotarredona, Teresa; Linares-Barranco, B.

doi:10.1016/j.mee.2018.06.011

Cited by 5 publications

(4 citation statements)

References 29 publications

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“…However, this is not enough to increase the required scalability in neuromorphic processors. For this purpose, a three-stage DC offset calibration scheme is proposed by varying the bulk voltage of one of the differential pair MOSFETs of the buffer using a cascaded resistor ladder such that, a calibration step less than 0.1 mV is obtained [14]. This paper experimentally validates the proposed calibration approach.…”

Section: Introductionmentioning

confidence: 75%

Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar

Mohan

Camuñas-Mesa

Vianello

et al. 2020

2020 IEEE International Symposium on Circuits and Systems (ISCAS)

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Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying small inference read pulses is a vain attempt when offset voltages of the read-out circuit are decisively more. This paper presents an experimental validation of a three-stage calibration scheme to calibrate the DC offset voltage across the rows of the memristive crossbar. The proposed method is based on biasing the body terminal of one of the differential pair MOSFETs of the buffer through a series of cascaded resistor banks arranged in three stages-coarse, fine and finer stages. The circuit is designed in a 130 nm CMOS technology, where the OxRAM-based binary memristors are built on top of it. A dedicated PCB and other auxiliary boards have been designed for testing the chip. Experimental results validate the presented approach, which is only limited by mismatch and electrical noise.

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Section: Introductionmentioning

confidence: 75%

Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar

Mohan

Camuñas-Mesa

Vianello

et al. 2020

2020 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…This paper proposes a Modified Current Normalizer (MCN) circuit for attenuating a crossbar read-out line current. Simulation results taking into account the effect of PVT variations are shown to validate the 978-1-5386-5108-7/17/$31.00 ©2018 IEEE Each row has a pre-synaptic neuron, which is made up of a pulse-shaping digital block and an opamp that is finely calibrated [18]. Each column is connected to a current attenuator circuit, followed by a post-synaptic neuron.…”

Section: Introductionmentioning

confidence: 89%

A Current Attenuator for Efficient Memristive Crossbars Read-Out

Mohan

Rosa

Vianello

et al. 2019

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper presents a new current attenuator circuit to scale down the inference currents in memristor based crossbars that drive integrate-and-fire neurons, which subsequently allows to reduce the size of integrating capacitors by several orders of magnitude, making IC integration possible. The proposed circuit uses a linear switch to divide the inference current and scale it down by a factor of about 10 4 . The proposed attenuator has been designed in 130nm CMOS technology. Simulation results considering noise, process and temperature variations are shown to validate the presented approach.

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“…Therefore, 1T1M crossbar arrays have already been widely studied. 6,[13][14][15][16][17][18][19][20][21][22][23][24] Wu's group fabricated a 128 Â 8 1T1M crossbar array of TiN/TaO x /HfAlyO x /TiN devices. 25 Using this 1024-cell array with parallel online training, a grey-scale face classication is demonstrated for the rst time experimentally.…”

Section: T1mmentioning

confidence: 99%

Research progress on solutions to the sneak path issue in memristor crossbar arrays

et al. 2020

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Calibration of offset via bulk for low-power HfO2 based 1T1R memristive crossbar read-out system

Cited by 5 publications

References 29 publications

Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar

Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar

A Current Attenuator for Efficient Memristive Crossbars Read-Out

Research progress on solutions to the sneak path issue in memristor crossbar arrays

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