Experimental Body-Input Three-Stage DC Offset Calibration Scheme for Memristive Crossbar

Abstract

Reading several ReRAMs simultaneously in a neuromorphic circuit increases power consumption and limits scalability. Applying small inference read pulses is a vain attempt when offset voltages of the read-out circuit are decisively more. This paper presents an experimental validation of a three-stage calibration scheme to calibrate the DC offset voltage across the rows of the memristive crossbar. The proposed method is based on biasing the body terminal of one of the differential pair MOSFETs of the buffer through a series of cascaded resistor banks arranged in three stages-coarse, fine and finer stages. The circuit is designed in a 130 nm CMOS technology, where the OxRAM-based binary memristors are built on top of it. A dedicated PCB and other auxiliary boards have been designed for testing the chip. Experimental results validate the presented approach, which is only limited by mismatch and electrical noise.

Neuromorphic Low-Power Inference on Memristive Crossbars With On-Chip Offset Calibration

“…Consequently, reducing the maximum driving currents can reduce the overall operation current (and power consumption) by over one order of magnitude. Experimental results of the bulk-based, threestage calibration approach to calibrate the DC offset voltages of opamps have already been reported [83]. Our proposal in this work was to experimentally demonstrate template matching and more sophisticated pattern recognition through STDP learning using the tiniest possible read inference pulses with opamps with calibrated offset voltages.…”

“…A three-stage bulk-based calibration scheme was implemented to finely tune the bulk voltage 'Out_calibi' of each opamp, as shown in Fig. 6 [83]. It consisted of cascaded resistor ladders of high ohmic unsalicided N+ polysilicon resistors with 16 levels in each stage.…”

“…These results were obtained by averaging 100 million samples in order to filter out noise, with standard deviation of about 200µV. Experimental results of the three-stage calibration scheme have been discussed in detail elsewhere [83]. The pre-synaptic lines were calibrated in such a manner that they aligned in the same level with the lowest possible mismatch.…”