Board level energy correlation and interconnect reliability modeling under drop impact

Abstract

Portable products as well as some larger products may see failures by a high strain rate mechanical loading like that seen in a high or low level drop/shock event. Within the portable product industry there is a wide range of product design, usage and loading conditions. Because of this, standards such as JEDEC, which is meant to generate comparative results addressing component reliability, do little or nothing to generalize the reliability of specific assemblies. To do this we need to consider both failure rates and failure mechanisms to better understand how specific loading conditions affect the failure of an assembly.A standard JEDEC style test board was assembled with BGA components and then drop tested with an input of various energy levels. Pad cratering was the failure mode for all assemblies. This allowed for an independent investigation into this one failure mode. During the drop test the energy from the impact event is transferred into the board, which causes a response. A comparison between the response energy and the input energy was made and, for this particular test assembly, the input correlated to the response reasonably well. Upon further investigation it was found that the failure rates correlated well to the energy levels at which it was tested. This allowed for the development of a predictive model based on these empirical results. With the failure mode of all assemblies being pad cratering on the PCB side of the solder joint it allowed for an investigation into the response of individual pads. The fatigue resistance and strength of the PCB pads was measured using pad-level testing techniques. By measuring the fatigue resistance as a function of a fixed load, it was possible to develop an S-N curve for this particular test vehicle. From this it was found that the pad lifetime is also highly dependent on the input level, as was seen in the drop testing of this test vehicle.This study also proposes a method to compare the input energy and the response energy of the board computed using the finite element method. Good correlation between the measured response energy and the simulated response energy has been achieved. A lifetime predictive model has been developed using the simulated response energy. Furthermore, 3D FEA model has been established using ANSYS implicit solver with consideration of detailed copper pad, trace and solder joint design to describe the dynamic behavior of PCB assembly and to predict the location of failure and failure mode after impact. For correlation studies, the maximum volume average Von Mises stress of PCB-pad interface at critical solder joint location is calculated and correlated well with the N 63 impact lives measured during the drop test. This was used to develop an impact life prediction model. Nanoindentation technique is used to measure the material properties of copper trace. In addition to solder joint dimensions and material properties, many other factors, including trace dimensions, component size and PCB thickness were also simulated to investigate th...

Impact of board configuration and shock loading conditions for board level drop test

“…The analysis was carried out using ANSYS v12.0. The material properties used in the finite element analysis are tabulated in table 3 [8]. The different input acceleration shock pulses measured on drop table were applied to the finite element model directly according to the support excitation scheme to analyze the drop test.…”

“…A previous study has shown that the drop reliability is highly dependent on not just the stress, but also the energy imparted to the board during the shock event [3,4]. Other researchers have shown by numerical analysis that by changing the board configuration to incorporate a constant symmetry with respect to the boundary conditions, the test will induce similar strain distributions across all packages on the test board leading to a more consistent drop test data [5].…”

Effects of PCB design variations on bend and ATC performance of lead-free solder joints

“…Godbole et al believes that the pad cratering failure modes are strain rate dependent, higher strain rate will induce higher pad cratering failure [4]. Agrawal et al also found that pad cratering failure mode is the dominant failure mode after drop test of lead-free products, and concluded that the drop life is dependent to the input energy [5]. Ahmad et al proposed a new method to test pad cratering failures, and found that pad size, PCB materials, pad geometry and other factors are important factors of pad cratering issues [6].…”

“…It is reported that PCB pad cratering failures due to the stiffness of solder joints are more severe in lead-free solder joints [3][4][5][6]. Godbole et al believes that the pad cratering failure modes are strain rate dependent, higher strain rate will induce higher pad cratering failure [4].…”

Modeling of board level solder joint reliability under mechanical drop test with the consideration of plastic strain hardening of lead-free solder

“…In the recent years, the Input-G method [4] was the most popular simulation method for drop test. Based on the previous simulations, several empirical drop life prediction models were proposed in the previous studies [5], [6], [7] although the failure mechanisms were still not clear. In the present study, strain hardening effect of lead free solder is considered as one possible reason to cause the brittle fracture of solder joints after a number of repetitive drops.…”