Bipolar Transistor with a Buried Layer Formed by High-Energy Ion   Implantation for Subhalf-Micron Bipolar-Complementary Metal Oxide Semiconductor LSIs

Kuroi, T.; Kawasaki, Youji; Ishigaki, Y.; Kinoshita, Y.; Inuishi, M.; Tsukamoto, K.; Tsubouchi, N.

doi:10.1143/jjap.33.541

Cited by 3 publications

(2 citation statements)

References 6 publications

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“…[1][2][3][4][5] It can provide a technique to form a buried layer, a retrograde well, and proximity gettering. 2 Particularly, latch-up susceptibility of complementary metal oxide semiconductor ͑CMOS͒ circuits can be improved.…”

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“…High energy ion implantation into silicon is used in ultralargescale integration ͑ULSI͒ fabrication processes because it can be used to control electrical properties in layers within a few micrometers from the surface. [1][2][3][4][5] It can provide a technique to form a buried layer, a retrograde well, and proximity gettering. 2 Particularly, latch-up susceptibility of complementary metal oxide semiconductor ͑CMOS͒ circuits can be improved.…”

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Interface Characteristics of SiO[sub 2]/Si Structure with High Energy Boron Implantation

Unagami

2002

J. Electrochem. Soc.

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Boron profiles and interface characteristics of SiO 2 /Si structure when boron was implanted by high energy implantation were studied. A very narrow ͑ϳ0.3 m͒ channel-stop layer can be formed under a 1.5 m thick SiO 2 layer by high energy B ϩ implantation. An ion dose of 1.5 ϫ 10 12 ions/cm 2 is adequate to form a channel-stop layer. The surface state density was 2.2 ϫ 10 11 /cm 2 after implantation and decreased to a value of 1 ϫ 10 11 /cm 2 following 1 h of heat-treatment at 1000°C. The surface state density was decreased by heat-treatment and recovered to a value equal to that of nonimplanted samples.High energy ion implantation into silicon is used in ultralargescale integration ͑ULSI͒ fabrication processes because it can be used to control electrical properties in layers within a few micrometers from the surface. 1-5 It can provide a technique to form a buried layer, a retrograde well, and proximity gettering. 2 Particularly, latch-up susceptibility of complementary metal oxide semiconductor ͑CMOS͒ circuits can be improved. 6 The use of N ϩ grids or p ϩ buried layers to reduce alpha-particle-induced soft errors in memory devices has also been proposed. 7 Device isolation was improved by high energy implantation through a field oxide. 1 Recently, multiple high energy ion implantations were used to generate profiled wells. 3 By employing multiple, high energy ion implantations, a profiled well can easily be implemented in a high performance CMOS. Otherwise, high energy ion implantation causes severe damage to the crystalline lattice. 8-10 One reason for using relatively low concentration buried layers in device applications is to avoid the adverse effects of implanted damage.In the case of a typical local oxidation of silicon ͑LOCOS͒ process, boron implantation with low energy is performed before field oxide formation. Then, boron is diffused during oxidation, that is, diffused to several micrometers from the bottom of the oxide film. Particularly, the carrier concentration decreases at the SiO 2 /Si interface due to segregation. The boron diffusion depth becomes large due to the high temperature and long time heat-treatment used to form the field oxide.Device isolation is improved by high energy implantation through a field oxide. For its realization, high energy ion implantation can be successfully applied to fabricate a channel-stop P ϩ layer after fabricating a LOCOS isolation structure. Little is known about impurity profiles and electrical activation characteristics for device fabrication processes. This paper reports on boron profiles and interface characteristics of a SiO 2 /Si structure when boron was implanted with a high energy implantation system of a 2.5 MeV Van de Graaff accelerator. ExperimentalThe substrate used in this experiment was a ͑111͒ oriented, p-type silicon wafer with a resistivity of 8-12 ⍀ cm. After standard initial cleaning, silicon oxide layers with a thickness of 0.15 or 1.5 m were formed on the wafers by pyrogenic oxidation at 1150°C.The wafers were implanted with boron ions at e...

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Interface Characteristics of SiO[sub 2]/Si Structure with High Energy Boron Implantation

Unagami

2002

J. Electrochem. Soc.

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The effect of as-implanted damage on the microstructure of threading dislocations in MeV implanted silicon

Bourdelle¹,

Eaglesham²,

Jacobson³

et al. 1999

Journal of Applied Physics

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The dose dependence of as-implanted damage and the density of threading dislocations formed after MeV implants into Si is measured. The role of the damage and amorphization in the evolution of dislocation microstructure is assessed. As-implanted damage is analyzed by Rutherford backscattering spectroscopy and channeling. Defect etching is used to delineate threading dislocations in near-surface regions of annealed (900 °C, 30 min) samples. For a variety of implants with 1.1 μm projected range (600 keV B, 1 MeV P, and 2 MeV As) we observe a sharp onset for formation of threading dislocations with a peak in dislocation density at a dose of about 1×1014 cm−2, this dose depends on the ion mass. With a further increase in dose, the dislocation density decreases. This decrease, however, is drastically different for the different ions: sharp (4–5 orders of magnitude) reduction for P and As implants and slow decline for B implant. The sharp decrease in the density of threading dislocations at higher doses is correlated with the onset of amorphization observed by channeling for P and As implants. Our data for low-temperature implants provide conclusive proof that a reduction in the dislocation density for P and As implants is a result of amorphization.

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Ranges and moments of depth distributions of boron and phosphorus implanted into silicon in the energy range 1.7-5.0 MeV with an Eaton NV-GSD/VHE implanter

Rubin

Shaw

Jones

et al.

Proceedings of 11th International Conference on Ion Implantation Technology

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Bipolar Transistor with a Buried Layer Formed by High-Energy Ion Implantation for Subhalf-Micron Bipolar-Complementary Metal Oxide Semiconductor LSIs

Cited by 3 publications

References 6 publications

Interface Characteristics of SiO[sub 2]/Si Structure with High Energy Boron Implantation

Interface Characteristics of SiO[sub 2]/Si Structure with High Energy Boron Implantation

The effect of as-implanted damage on the microstructure of threading dislocations in MeV implanted silicon

Ranges and moments of depth distributions of boron and phosphorus implanted into silicon in the energy range 1.7-5.0 MeV with an Eaton NV-GSD/VHE implanter

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