Automatic synthesis of communication controller hardware from protocol specifications

Siegmund, Robert; Müller, Dietmar

doi:10.1109/mdt.2002.1018137

Cited by 22 publications

(5 citation statements)

References 9 publications

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“…From BNF grammars,Öberg synthesizes controllers using a directed acyclic graph representation [6]. Alternatively, Müller [7] defined a dedicated SystemC library to describe the specifications and uses automatabased methods to build the final design.…”

Section: State Of the Artmentioning

confidence: 99%

SyntHorus: Highly efficient automatic synthesis from PSL to HDL

Oddos¹,

Morin-Allory²,

Borrione³

2009

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC)

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We propose a linear complexity approach to achieve automatic synthesis of designs from temporal specifications. Each property is turned into a component combining monitor and generator features: the extended-generator. We connect them with specific components to obtain a design that is correct by construction. It shortens the design flow by removing implementation and functional verification steps. Our approach synthesizes circuits specified by hundreds of temporal properties in a few seconds. Complex examples (i.e. CONMAX-IP and GenBuf) show the efficiency of the approach.

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Section: State Of the Artmentioning

confidence: 99%

SyntHorus: Highly efficient automatic synthesis from PSL to HDL

Oddos¹,

Morin-Allory²,

Borrione³

2009

2009 17th IFIP International Conference on Very Large Scale Integration (VLSI-SoC)

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“…Therefore, standard simulation tools offer no verification support for the protocol. In view of this, a SystemC extension language called SV is adopted in [4] as the formalism of protocol description. SystemC provides a better integration with the existing SoC design, simulation and verification context.…”

Section: Introduction and Previous Workmentioning

confidence: 99%

An IP interface design compiler with SystemC based input specifications

Hwang

Chen

2014

2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

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We present an interface synthesis tool (design compiler) which can generate interface circuits automatically to expedite the IP (silicon intellectual property) integration process in SoC designs. The protocol specification issue is first addressed and a programming paradigm in SystemC language is developed. The methodology for interface synthesis is next elaborated. Conventional compiler techniques such as lexical analysis, syntax parsing and code generation are applied plus the new processing specific to interface synthesis. This includes protocol signal mapping proxy for additional semantic information, interface FSM synthesis for the controller of protocol conversion and architecture template mapping for the underlined hardware. Various interface design examples are conducted and the experimental results show the competitiveness of the proposed synthesis tool.

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“…There exist academic [15][16] [17] and commercial [18] grammar based tools for protocol description. Though these approaches do not address the problem of system design, they demonstrate two clear advantages, firstly: the ease of protocol description using grammar, and secondly: the smooth path to HW synthesis from a grammar description.…”

Section: Introductionmentioning

confidence: 99%

System design for DSP applications in transaction level modeling paradigm

Deb

Jantsch

Öberg

2004

Proceedings of the 41st Annual Design Automation Conference

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In this paper, we systematically define three transaction level models (TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP system. We also show a unique language support to build the TLMs. Our results show that the abstract TLMs can be built and simulated much faster than the implementation model at the expense of a reasonable amount of simulation accuracy.

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Automatic synthesis of communication controller hardware from protocol specifications

Cited by 22 publications

References 9 publications

SyntHorus: Highly efficient automatic synthesis from PSL to HDL

SyntHorus: Highly efficient automatic synthesis from PSL to HDL

An IP interface design compiler with SystemC based input specifications

System design for DSP applications in transaction level modeling paradigm

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